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PDF TC74LVX245FW Data sheet ( Hoja de datos )

Número de pieza TC74LVX245FW
Descripción OCTAL BUS TRANSCEIVER
Fabricantes Toshiba Semiconductor 
Logotipo Toshiba Semiconductor Logotipo



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TC74LVX245F/FW/FT
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74LVX245F,TC74LVX245FW,TC74LVX245FT
Octal Bus Transceiver
The TC74LVX245F/ FW/ FT is a high-speed CMOS octal bus
transceiver fabricated using silicon gate CMOS technology.
Designed for use in 3-V systems, it achieves high-speed operation
while maintaining the CMOS low power dissipation.
These devices are suitable for low-voltage and battery operated
systems.
It is intended for two-way asynchronous communication
between data busses.
The direction of data transmission is determined by the level of
the DIR input. The enable input (G) can be used to disable the
device so that the busses are effectively isolated.
All inputs are equipped with protection circuits against static
discharge.
Note: xxxFW (JEDEC SOP) is not available in
Japan.
TC74LVX245F
TC74LVX245FW
Features
· High-speed: tpd = 4.7 ns (typ.) (VCC = 3.3 V)
· Low power dissipation: ICC = 4 µA (max) (Ta = 25°C)
· Input voltage level: VIL = 0.8 V (max) (VCC = 3 V)
VIH = 2.0 V (min) (VCC = 3 V)
www.DataSheet4U.com· Balanced propagation delays: tpLH tpHL
TC74LVX245FT
· Low niose: VOLP = 0.8 V (max)
· Pin and function compatible with 74HC245
Note 1:
Do not apply a signal to any bus pins when it is in the
output mode. Damage may result.
All floating (high impedance) bus pins must have their
input levels fixed by means of pull-up or pull-down
resistors.
A parasitic diode is formed between the bus and VCC
terminals. Therefore bus terminal can not be used to
interface 5-V to 3-V systems directly.
Weight
SOP20-P-300-1.27: 0.22 g (typ.)
SOL20-P-300-1.27: 0.46 g (typ.)
TSSOP20-P-0044-0.65: 0.08 g (typ.)
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TC74LVX245FW pdf
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TC74LVX245F/FW/FT
Noise Characteristics (Ta = 25°C, input: tr = tf = 3 ns, CL = 50 pF)
Characteristics
Symbol
Quiet output maximum
dynamic
VOL VOLP
Quiet output minimum
dynamic
VOL VOLV
Minimum high level dynamic
input voltage
VIH
VIHD
Maximum low level dynamic
input voltage
VIL
VILD
Test Condition
¾
¾
¾
¾
Typ.
VCC (V)
3.3 0.5
Limit
0.8
Unit
V
3.3 -0.5 -0.8
V
3.3 ¾ 2.0 V
3.3 ¾ 0.8 V
Input Equivalent Circuit
Bus Terminal Equivalent Circuit (An, Bn)
INPUT
I/O
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