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Número de pieza | HM5116405 | |
Descripción | (HM5116405 / HM5117405) 16M EDO DRAM | |
Fabricantes | Hitachi | |
Logotipo | ||
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HM5116405 Series
HM5117405 Series
16 M EDO DRAM (4-Mword × 4-bit)
4 k Refresh/2 k Refresh
ADE-203-633D (Z)
Rev. 4.0
Nov. 1997
Description
The Hitachi HM5116405 Series, HM5117405 Series are CMOS dynamic RAMs organized 4,194,304-word
× 4-bit. They employ the most advanced CMOS technology for high performance and low power. The
HM5116405 Series, HM5117405 Series offer Extended Data Out (EDO) Page Mode as a high speed
access mode. They have package variations of standard 26-pin plastic SOJ and standard 26-pin plastic
TSOP II.
Features www.DataSheet4U.com
• Single 5 V (±10%)
• Access time: 50 ns/60 ns/70 ns (max)
• Power dissipation
Active mode : 495 mW/440 mW/385 mW (max) (HM5116405 Series)
: 550 mW/495 mW/440 mW (max) (HM5117405 Series)
Standby mode : 11 mW (max)
: 0.83 mW (max) (L-version)
• EDO page mode capability
• Long refresh period
4096 refresh cycles : 64 ms (HM5116405 Series)
: 128 ms (L-version)
2048 refresh cycles : 32 ms (HM5117405 Series)
: 128 ms (L-version)
• 3 variations of refresh
RAS-only refresh
CAS-before-RAS refresh
Hidden refresh
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HM5116405 Series, HM5117405 Series
Block Diagram (HM5116405 Series)
RAS
CAS
WE
OE
Timing and control
A0 Column decoder
A1 Column
to
• address
•
• buffers
A9
4M array
4M array
•
•
• Row
4M array
I/O buffers
I/O1
to
I/O4
address
bwufferws w.DataSheet4U.com
A10 4M array
A11
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HM5116405 Series, HM5117405 Series
AC Characteristics (Ta = 0 to +70°C, VCC = 5 V ±10%, VSS = 0 V) *1, *2, *18
Test Conditions
• Input rise and fall time: 2 ns
• Input levels: VIL = 0 V, VIH = 3 V
• Input timing reference levels: 0.8 V, 2.4 V
• Output timing reference levels: 0.8 V, 2.0 V
• Output load: 1 TTL gate + CL (100 pF) (Including scope and jig)
Read, Write, Read-Modify-Write and Refresh Cycles (Common parameters)
HM5116405/HM5117405
-5 -6 -7
Parameter
Symbol Min Max Min Max Min Max Unit
Random read or write cycle time tRC
84 — 104 — 124 — ns
RAS precharge time
tRP 30 — 40 — 50 — ns
CAS precharge time
tCP 7 — 10 — 13 — ns
RAS pulse width
www.DataSheet4U.comCAS pulse width
tRAS 50 10000 60 10000 70 10000 ns
tCAS 7 10000 10 10000 13 10000 ns
Row address setup time
tASR 0 — 0 — 0 — ns
Row address hold time
tRAH 7 — 10 — 10 — ns
Column address setup time
tASC 0 — 0 — 0 — ns
Column address hold time
tCAH 7 — 10 — 13 — ns
RAS to CAS delay time
tRCD 11 37 14 45 14 52 ns
RAS to column address delay time tRAD
9 25 12 30 12 35 ns
RAS hold time
tRSH 10 — 13 — 13 — ns
CAS hold time
tCSH 35 — 40 — 45 — ns
CAS to RAS precharge time
tCRP 5 — 5 — 5 — ns
OE to Din delay time
tOED 13 — 15 — 18 — ns
OE delay time from Din
tDZO 0 — 0 — 0 — ns
CAS delay time from Din
tDZC 0 — 0 — 0 — ns
Transition time (rise and fall) tT 2 50 2 50 2 50 ns
Notes
3
4
5
6
6
7
D a t a S h 4e eUt. c o m
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11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet HM5116405.PDF ] |
Número de pieza | Descripción | Fabricantes |
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HM5116405 | (HM5116405 / HM5117405) 16M EDO DRAM | Hitachi |
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