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PDF KM68512B Data sheet ( Hoja de datos )
| Número de pieza | KM68512B | |
| Descripción | 64Kx8 bit Low Power CMOS Static RAM | |
| Fabricantes | Samsung semiconductor | |
| Logotipo |  |
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KM68512B Family
Document Title
64Kx8 bit Low Power CMOS Static RAM
Revision History
Revision No.
0.0
History
Initial draft
Advance
CMOS SRAM
Draft Data
January 10th 1998
Remark
Advance
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The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right
to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you ha ve
any questions, please contact the SAMSUNG branch office near you.
1 Revision 0.0
January 1998
DataSheet 4 U .com
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1 page  
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KM68512B Family
AC OPERATING CONDITIONS
TEST CONDITIONS ( Test Load and Input/Output Reference)
Input pulse level : 0.8 to 2.4V
Input rising and faling time : 5ns
Input and output reference voltage :1.5V
Output load(see right) : C L=100pF+1TTL
Advance
CMOS SRAM
CL1)
1. Including scope and jig capacitance
AC CHARACTERISTICS (Vcc=4.5~5.5V, KM68512B Family : TA=0 to 70°C, KM68512BI Family : TA=-40 to 85°C)
Read
Write
Speed Bins
Parameter List
Symbol
55ns
70ns
Min Max Min Max
Read cycle time
tRC 55 - 70 -
Address access time
tAA - 55 - 70
Chip select to output
tCO - 55 - 70
Output enable to valid output
tOE - 25 - 35
Chip select to low-Z output
tLZ 10 - 10 -
Output enable to low-Z output
tOLZ 5 - 5 -
Chip disable to high-Z output
tHZ 0 20 0 25
Output disable to high-Z output
tOHZ
0 20 0 25
Output hold from address change
tOH 10 - 10 -
Write cycle time
tWC 55 - 70 -
Chip select to end of write
www.DataSheet4U.comAddress set-up time
tCW 45 - 60
tAS 0 - 0
-
-
Address valid to end of write
tAW 45 - 60 -
Write pulse width
tWP 40 - 55 -
Write recovery time
tWR 0 - 0 -
Write to output high-Z
tWHZ
0 20 0 25
Data to write time overlap
tDW 20 - 30 -
Data hold from write time
tDH 0 - 0 -
End write to output low-Z
tOW 5 - 5 -
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DATA RETENTION CHARACTERISTICS
Item
Vcc for data retention
Data retention current
Data retention set-up time
Recovery time
Symbol
Test Condition
Min Typ Max Unit
VDR CS11)≥Vcc-0.2V
2.0 - 5.5 V
KM68512BL-L
IDR Vcc=3.0V, CS1≥Vcc-0.2V
KM68512BLI-L
-
-
0.5 10
µA
- 15
tSDR
tRDR
See data retention waveform
0- -
ms
5- -
1. CS1≥Vcc-0.2V, CS2≥Vcc-0.2V( CS1 controlled) or CS2≤0.2V(CS2 controlled).
DataSheet 4 U .com
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January 1998
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| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet KM68512B.PDF ] | |
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