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PDF 54LS193 Data sheet ( Hoja de datos )
| Número de pieza | 54LS193 | |
| Descripción | SN54LS193 | |
| Fabricantes | ETC | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de 54LS193 (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
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PRESETTABLE BCD/DECADE
UP/DOWN COUNTER
PRESETTABLE 4-BIT BINARY
UP/DOWN COUNTER
The SN54/74LS192 is an UP/DOWN BCD Decade (8421) Counter and the
SN54/74LS193 is an UP/DOWN MODULO-16 Binary Counter. Separate
Count Up and Count Down Clocks are used and in either counting mode the
www.DataSheet4cUir.ccuoimts operate synchronously. The outputs change state synchronous with
the LOW-to-HIGH transitions on the clock inputs.
Separate Terminal Count Up and Terminal Count Down outputs are
provided which are used as the clocks for a subsequent stages without extra
logic, thus simplifying multistage counter designs. Individual preset inputs
allow the circuits to be used as programmable counters. Both the Parallel
Load (PL) and the Master Reset (MR) inputs asynchronously override the
clocks.
• Low Power . . . 95 mW Typical Dissipation
• High Speed . . . 40 MHz Typical Count Frequency
• Synchronous Counting
• Asynchronous Master Reset and Parallel Load
• Individual Preset Inputs
• Cascading Circuitry Internally Provided
• Input Clamp Diodes Limit High Speed Termination Effects
CONNECTION DIAGRAM DIP (TOP VIEW)
V CC
16
P0
15
MR TC D TC U PL
14 13 12 11
P2 P3
10 9
1 2 3 4 56
78
P 1 Q 1 Q 0 CP D CP U Q 2 Q 3 GND
NOTE:
The Flatpak version
has the same pinouts
(Connection Diagram) as
the Dual In-Line Package.
PIN NAMES
LOADING (Note a)
HIGH
LOW
CPU
CPD
MR
Count Up Clock Pulse Input
Count Down Clock Pulse Input
Asynchronous Master Reset (Clear) Input
0.5 U.L.
0.5 U.L.
0.5 U.L.
0.25 U.L.
0.25 U.L.
0.25 U.L.
PL Asynchronous Parallel Load (Active LOW) Input 0.5 U.L. 0.25 U.L.
Pn
Qn
TCD
TCU
Parallel Data Inputs
Flip-Flop Outputs (Note b)
Terminal Count Down (Borrow) Output (Note b)
Terminal Count Up (Carry) Output (Note b)
0.5 U.L.
10 U.L.
10 U.L.
10 U.L.
0.25 U.L.
5 (2.5) U.L.
5 (2.5) U.L.
5 (2.5) U.L.
NOTES:
a. 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.
b. The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)
b. Temperature Ranges.
SN54/74LS192
SN54/74LS193
PRESETTABLE BCD/ DECADE
UP/ DOWN COUNTER
PRESETTABLE 4-BIT BINARY
UP/ DOWN COUNTER
LOW POWER SCHOTTKY
16
1
J SUFFIX
CERAMIC
CASE 620-09
16
1
N SUFFIX
PLASTIC
CASE 648-08
16
1
D SUFFIX
SOIC
CASE 751B-03
ORDERING INFORMATION
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXD
Ceramic
Plastic
SOIC
LOGIC SYMBOL
11 15 1 10 9
PL P 0 P 1 P 2 P 3
5 CP U
TC U
12
4 CP D
TC D
13
MR Q 0 Q 1 Q 2 Q 3
14 3 2 6 7
V CC = PIN 16
GND = PIN 8
FAST AND LS TTL DATA
5-351
1 page  
SN54/74LS192 • SN54/74LS193
GUARANTEED OPERATING RANGES
Symbol
Parameter
VCC
Supply Voltage
TA Operating Ambient Temperature Range
IOH Output Current — High
IOL Output Current — Low
Min Typ Max Unit
54 4.5 5.0 5.5
74 4.75 5.0 5.25
V
54 – 55 25 125 °C
74 0 25 70
54, 74
– 0.4
mA
54 4.0 mA
74 8.0
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
www.DataSheet4U.com
Limits
Symbol
Parameter
Min Typ Max Unit
Test Conditions
VIH Input HIGH Voltage
2.0
Guaranteed Input HIGH Voltage for
V All Inputs
VIL Input LOW Voltage
54
74
0.7 Guaranteed Input LOW Voltage for
0.8 V All Inputs
VIK
VOH
Input Clamp Diode Voltage
Output HIGH Voltage
54
74
– 0.65 – 1.5
2.5 3.5
2.7 3.5
V VCC = MIN, IIN = – 18 mA
V VCC = MIN, IOH = MAX, VIN = VIH
V or VIL per Truth Table
VOL
Output LOW Voltage
54, 74
74
0.25 0.4
0.35 0.5
IIH Input HIGH Current
20
0.1
IIL Input LOW Current
– 0.4
IOS
Short Circuit Current (Note 1)
– 20
– 100
ICC Power Supply Current
34
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
V IOL = 4.0 mA
V IOL = 8.0 mA
VCC = VCC MIN,
VIN = VIL or VIH
per Truth Table
µA VCC = MAX, VIN = 2.7 V
mA VCC = MAX, VIN = 7.0 V
mA VCC = MAX, VIN = 0.4 V
mA VCC = MAX
mA VCC = MAX
AC CHARACTERISTICS (TA = 25°C)
Symbol
fMAX
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPHL
Parameter
Maximum Clock Frequency
CPU Input to
TCU Output
CPD Input to
TCD Output
Clock to Q
PL to Q
MR Input to Any Output
Limits
Min Typ Max
25 32
17 26
18 24
16 24
15 24
27 38
30 47
24 40
25 40
23 35
Unit
MHz
ns
ns
ns
ns
ns
Test Conditions
VCC = 5.0 V
CL = 15 pF
FAST AND LS TTL DATA
5-355
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet 54LS193.PDF ] | |
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