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PDF IMIFS784 Data sheet ( Hoja de datos )
| Número de pieza | IMIFS784 | |
| Descripción | (IMIFS781/82/84) Low EMI Spectrum Spread Clock | |
| Fabricantes | Cypress Semiconductor | |
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FS781/82/84
Features
• Spread Spectrum clock generator (SSCG) with 1×, 2×,
and 4× outputs
• 6- to 82-MHz operating frequency range
• Modulates external clocks including crystals, crystal
oscillators, or ceramic resonators
• Programmable modulation with simple R-C external
loop filter (LF)
• Center spread modulation
• 3V-5V power supply
• TTL-/CMOS-compatible outputs
• Low short-term jitter
• Low-power Dissipation
— 3.3 VDC = 37 mW – typical
— 5.0 VDC = 115 mW – typical
• Available in 8-pin SOIC and TSSOP packages
Applications
• Desktop/notebook computers
• Printers, copiers, and MFP
• Scanners and fax
• LCD displays and monitors
• CD-ROM, VCD, and DVD
• Automotive and embedded systems
• Networking, LAN/WAN
• Digital cameras and camcorders
• Modems
Benefits
• Programmable EMI reduction
• Fast time to market
• Lower cost of compliance
• No degradation in rise/fall times
• Lower component and PCB layer count
Low EMI Spectrum Spread Clock
Description
The Cypress FS781/82/84 are Spread Spectrum clock
generator ICs (SSCG) designed for the purpose of reducing
electromagnetic interference (EMI) found in today’s
high-speed digital systems.
The FS781/82/84 SSCG clocks use a Cypress-proprietary
technology to modulate the input clock frequency, XIN, by
modulating the frequency of the digital clock. By modulating
the reference clock the measured EMI at the fundamental and
harmonic frequencies of FSOUT is greatly reduced. This
reduction in radiated energy can significantly reduce the cost
of complying with regulatory requirements without degrading
digital waveforms.
The Cypress FS781/82/84 clocks are very simple and
versatile devices to use. By programming the two range select
lines, S0 and S1, any frequency from 6- to 82-MHz operating
range can be selected. The FS781/2/4 are designed to
operate over a very wide range of input frequencies and
provides 1×, 2×, and 4× modulated clock outputs.
The FS78x devices have a simple frequency selection table
that allows operation from 6 MHz to 82 MHz in four separate
ranges. The bandwidth of the frequency spread at FSOUT is
determined by the values of the loop filter components. The
modulation rate is determined internally by the input frequency
and the selected input frequency range.
The Bandwidth of these products can be programmed from as
little as 1.0% up to as much as 4.0% by selecting the proper
loop filter value. Refer to the Loop Filter Selection chart in
Table 2 and Table 3 for the recommended values. Due to a
wide range of application requirements, an external loop filter
(LF) is used on the FS78x products. The user can select the
exact amount of frequency modulation suitable for the appli-
cation. Using a fixed internal loop filter would severely limit
the use of a wide range of modulation bandwidths (Spread %)
to a few discrete values. Refer to FS791/2/4 products for appli-
cations requiring 80- to 140-MHz frequency range.
Block Diagram
250 K
Xin 1(3)
8 pF
Xout 2(4)
8 pF
Reference
Divider
Modulation
Control
VDD 8(2)
Power Contol
Logic
VDD Input Control Logic
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5(7)
VSS
3(5) 7(1)
S1 S0
Pin Configuration
Loop Filter
4(6)
Phase
Detector
10 pF.
VCO
VCO / N
Output
Divider
and
Mux
VSS
(TSSOP Pin #)
Xin
Xout
S1
LF
18
2 FS78x 7
36
45
VDD
S0
FSOUT
VSS
8 Pin SOIC Package
S0
VDD
6(8) FSOUT
Xin
Xout
18
2 FS78x 7
36
45
FSOUT
VSS
LF
S1
8 Pin TSSOP Package
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-07029 Rev. *C
Revised December 14, 2002
1 page  
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FS781/82/84
SSCG Modulation Profile
The digital control inputs S0 and S1 determine the modulation
frequency of FS781/2/4 products. The input frequency is
divided by a fixed number, depending on the operating range
that is selected. The modulation frequency of the FS78x can
be determined from Table 4. To compute the modulation
frequency, determine the values of S0 and S1, and find the
modulation divider number in Table 4.
Table 4. Modulation Rate Divider Ratios
S1 S0
00
01
10
11
Input Frequency Range (MHz)
6 to 16
16 to 32
32 to 66
66 to 82
Modulation Divider Number
120
240
480
720
+ .5%
1.0% Xin
Total
- .5%
TIME (microseconds)
Figure 1. Frequency Profile in Time Domain[5]
Theory of Operation
The FS781/82/84 devices are phase-lock loop-(PLL)-type
clock generators using Direct Digital Synthesis (DDS). ‘By
precisely controlling the bandwidth of the output clock, the
FS781/2/4 products become a low-EMI clock generator. The
theory and detailed operation of these products will be
discussed in the following sections.
EMI
All clocks generate unwanted energy in their harmonics.
Conventional digital clocks are square waves with a duty cycle
that is very close to 50%. Because of the 50/50 duty cycle,
digital clocks generate most of their harmonic energy in the
odd harmonics (e.g., third, fifth, seventh). It is possible to
reduce the amount of energy contained in the fundamental
and harmonics by increasing the bandwidth of the funda-
mental clock frequency. Conventional digital clocks have a
very high Q factor, which means that all of the energy at that
frequency is concentrated in a very narrow bandwidth, conse-
quently, higher energy peaks. Regulatory agencies test
electronic equipment by the amount of peak energy radiated
from the equipment. By reducing the peak energy at the funda-
mental and harmonic frequencies, the equipment under test is
able to satisfy agency requirements for EMI. Conventional
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methods of reducing EMI have been to use shielding, filtering,
multi-layer PCBs, etc. These FS781/2 and 4 reduce the peak
energy in the clock by increasing the clock bandwidth and
lowering the Q of the clock.
SSCG
The FS781/82/84 products use a unique method of modulating
the clock over a very narrow bandwidth and controlled rate of
change, both peak to peak and cycle to cycle. The FS78x
products take a narrow band digital reference clock in the
range of 6 – 82 MHz and produce a clock that sweeps between
a controlled start and stop frequency and precise rate of
change. To understand what happens to an SSCG clock,
consider that we have a 20-MHz clock with a 50% duty cycle.
From a 20-MHz clock we know the following:
Clock Frequency = Fc = 20 MHz.
Clock Period = Tc = 1/20 MHz = 50 ns.
Consider that this 20-MHz clock is applied to the XIN input of
the FS78x as either an externally driven clock or the result of
a parallel resonant crystal connected to pins 1 and 2 of the
FS78x. Also consider that the products are operating from a
5V DC power supply and the loop filter is set for a total
bandwidth spread of 2%. Refer to Figure 2.
Note:
5. With the correct loop filter connected to Pin 4, the following profile will provide the best EMI reduction. This profile can be seen on a Time Domain Analyzer.
Document #: 38-07029 Rev. *C
Page 5 of 11
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FS781/82/84
Document Title: FS781/82/84 Low EMI Spectrum Spread Clock
Document Number: 38-07029 Rev *B
REV.
ECN NO.
Issue
Date
Orig. of
Change
Description of Change
**
106948 06/07/01
IKA Convert from IMI to Cypress
*A
111654 02/27/02
IKL Add new marking suffix for SOIC packages. Converted to FrameMaker.
*B
118355 08/30/02
RGL Swap the location of S0 and S1 in tables 2 and 3 in pages 2,3 and 4.
*C
122679 12/14/02
RBI Add power up requirements to operating conditions information.
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Document #: 38-07029 Rev. *C
Page 11 of 11
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet IMIFS784.PDF ] | |
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