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UM6164 fiches techniques PDF

UMC - 8K x 8 High Speed CMOS SRAM

Numéro de référence UM6164
Description 8K x 8 High Speed CMOS SRAM
Fabricant UMC 
Logo UMC 





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UM6164 fiche technique
SUMO
UM6164
=====~=~== BK x 8 High Speed CMOS SRAM
Features
• High-speed - 45/55/70ns (Max.)
• Low p'ower dissipation
300mW (Typ.) Operating
100J.l.W (Typ.) standby
• Single 5V power supply
• Fully static operation
• All inputs and outputs directly TTL compatible
• Three state outputs
• Data retention supply voltage: 2.0-5,5V
General Description
The UM6164 is a 65,536-bit static random access memory
organized as 8192 words by 8 bits' and operates from a
single 5 volt supply. It is built with UMC's high perform-
ance twin tub CMOS process. Inputs and three-state
outputs are TTL compatible and allow for direct interfacing
with common system bus structures. The UM6164 is
moulded in a standard 28-pin, 600 mil-DIP.
Pin Configuration .
Block Diagram
--<> Vcc
~GND
ROW
DECODE
256 x 256
MEMORY ARRAY
AU
INPUT
DATA
CIRCUIT
COLUMN I/O
.COLUMN DECODER
CS2
CSt
OE
WE
2-43

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