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PDF M38510-05252BCA Data sheet ( Hoja de datos )
| Número de pieza | M38510-05252BCA | |
| Descripción | Logic Gate | |
| Fabricantes | National Semiconductor | |
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INCH-POUND
MIL-M-38510/52E
3 December 2004
MILITARY SPECIFICATION
MICROCIRCUITS, DIGITAL, CMOS, NOR GATES,
MONOLITHIC SILICON, POSITIVE LOGIC
SUPERSEDING
MIL-M-38510/52D
30 April 1984
Reactivated after 3 December 2004 and may be used for new and existing designs and acquisitions.
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product herein shall consist of this specification sheet and MIL-PRF 38535
1. SCOPE
1.1 Scope. This specification covers the detail requirements for monolithic silicon, CMOS, logic microcircuits.
Two product assurance classes and a choice of case outlines, lead finishes, and radiation hardness assurance (RHA)
are provided and are reflected in the complete Part or Identifying Number (PIN). For this product, the requirements of
MIL-M-38510 have been superseded by MIL-PRF-38535 (see 6.3).
1.2 Part or identifying number (PIN). The PIN is in accordance with MIL-PRF-38535 and as specified herein.
1.2.1 Device types. The device types are as follows:
Device type
01
02
03
04
51
52
53
54
Circuit
Dual 3-input NOR gate (plus inverter)
Quad 2-input NOR gate
Dual 4-input NOR gate
Triple 3-input NOR gate
Dual 3-input NOR gate (plus inverter)
Quad 2-input NOR gate
Dual 4-input NOR gate
Triple 3-input NOR gate
1.2.2 Device class. The device class is the product assurance level as defined in MIL-PRF-38535.
1.2.3 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows:
Outline letter
Descriptive designator
Terminals
Package style
A GDFP5-F14 or CDFP6-F14 14 Flat pack
C GDIP1-T14 or CDIP2-T14
14 Dual-in-line
D GDFP1-F14 or CDFP2-F14 14 Flat pack
T CDFP3-F14
14 Flat pack
X GDFP5-F14 or CDFP6-F14 14 Flat pack, except A dimension
equals 0.1” (2.54 mm) max
Y GDFP1-F14 or CDFP2-F14 14 Flat pack, except A dimension
1/ As an exception to nickel plate or undercoating paragraph of MIL-PRF-38535, appendix A, for case outlines X and Y only,
the leads of bottom brazed ceramic packages (i.e., configuration 2 of case outlines A or D) may have electroless nickel
undercoating which is 50 to 200 microinches (1.27 to 5.08 µm) thick provided the lead finish is hot solder dip (i.e., finish letter
A) and provided that, after any lead forming, an additional hot solder dip coating is applied which extends from the outer tip
of the lead to no more than 0.015 inch (0.38 mm) from the package edge.
2/ For bottom or side brazed packages, case outlines X and Y only, the S1 dimension may go to .000 inch (.00 mm) minimum.
Comments, suggestions, or questions on this document should be addressed to: Commander, Defense
Supply Center Columbus, ATTN: DSCC-VAC, P.O. Box 3990, Columbus, OH 43218-3990, or email
[email protected]. Since contact information can change, you may want to verify the currency of this
address information using the ASSIST Online database at http://assist.daps.dla.mil.
wwAwM.SDCaNt/aASheet4U.com
FSC 5962
1 page  
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MIL-M-38510/52E
TABLE I. Electrical performance characteristics – Continued.
Test
Input low voltage
Output low (sink)
current
Output high (source)
current
Input leakage current, high
Input leakage current, low
Input capacitance
Propagation delay time,
high level to low level
Propagation delay time,
low level to high level
Symbol
VIL1
VIL2
VIL3
IOL1
Conditions VSS = 0 V
-55°C ≤ TA ≤ +125°C
Unless otherwise specified
VDD = 5 V dc
All inputs = 1.5 V dc
VO = 4.5 V dc, ⏐IO⏐ ≤ 1µA
VDD = 10 V dc
All inputs = 3.0 V dc
VO = 9.0 V dc, ⏐IO⏐ ≤ 1µA
VDD = 15 V dc
All inputs = 4.0 V dc
VO = 13.5 V dc, ⏐IO⏐ ≤ 1µA
VDD = 5 V dc
VIN = 5.0 V dc
VOL = 0.4 V dc
IOL2 VDD = 15 V dc
VIN = 15.0 V dc
VOL = 1.5 V dc
IOH1 VDD = 5 V dc
All inputs = GND
VOH = 4.6 V dc
IOH2 VDD = 15 V dc
All inputs = GND
VOH = 13.5 V dc
IIH Measure inputs
sequentially
1/
VDD = 15 V dc
Device
type
51, 52,
53, 54
51, 52,
53, 54
51, 52,
53, 54
51, 52,
53, 54
51, 52,
53, 54
51, 52,
53, 54
51, 52,
53, 54
01, 02,
04
03
IIL Measure inputs
sequentially
1/
VDD = 18 V dc
VDD = 15 V dc
51, 53
52, 54
01, 02,
04
03
VDD = 18 V dc 51, 53
52, 54
Ci VDD = 0 V dc, f = 1 MHz,
TA = 25°C
tPHL VDD = 5 V dc, CL = 50 pF
(See figure 3)
tPLH
All
All
01, 51
02, 52
03, 04,
53, 54
Limits
Min Max
Unit
1.5 V dc
3.0 V dc
4.0 V dc
0.36 mA dc
2.4 mA dc
-0.36
-2.4
mA dc
mA dc
100.0
45.0
45.0
100.0
-100.0
-45.0
-45.0
-100.0
12
nA
nA
pF
10 315 ns
10 415
13 315
10 315
Transition time,
high level to low level
Transition time,
low level to high level
tTHL VDD = 5 V dc, CL = 50 pF
(See figure 3)
tTLH
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1/ Input current at one input node.
5
All
01, 51
02, 03,
04, 52,
53, 54
10
10
10
450 ns
675
615
5 Page 
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4.2.1 Percent defective allowable (PDA).
MIL-M-38510/52E
a. The PDA for class S devices shall be 5 percent for static burn-in and 5 percent for dynamic burn-in,
based on the exact number of devices submitted to each separate burn-in.
b. Static burn-in I and II failure shall be cumulative for determining the PDA.
c. The PDA for class B devices shall be in accordance with MIL-PRF-38535 for static burn-in. Dynamic
burn-in is not required.
d. Those devices whose measured characteristics, after burn-in, exceed the specified delta (∆) limits or
electrical parameter limits specified in table III, subgroup 1, are defective and shall be removed from the
lot. The verified failures divided by the total number of devices in the lot initially submitted to burn-in shall
be used to determine the percent defective for the lot and the lot shall be accepted or rejected based on
the specified PDA.
4.3 Qualification inspection. Qualification inspection shall be in accordance with MIL-PRF-38535.
4.3.1 Qualification extension. When authorized by the qualifying activity, if a manufacturer qualifies to a 51, 52,
53, or 54 device type which is manufactured identically to a 01, 02, 03, or 04 device type on this specification, then
the 01, 02, 03, or 04 device type may be part I qualified by conducting only group A electrical tests and any electrical
tests specified as additional group C subgroups and submitting data in accordance with MIL-PRF-38535.
4.4 Technology Conformance inspection (TCI). Technology conformance inspection shall be in accordance with
MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.5).
4.4.1 Group A inspection. Group A inspection shall be in accordance with table III of MIL-PRF-38535 and as
follows:
a. Tests shall be performed in accordance with table II herein.
b. Subgroups 5, 6, 7, and 8 shall be omitted.
c. Subgroup 4 (CI measurement) shall be measured only for initial qualification and after process or design
changes that may affect input capacitance. Capacitance shall be measured between the designated
terminal and VSS at a frequency of 1 MHz.
d. Subgroups 9 and 11 shall be measured only for initial qualification and after process or design changes
which may affect dynamic performance.
e. When device types 01 through 04 are qualified by extension (see 4.3.1), these device types will be
inspected (QCI) according to the requirements for device types 51 through 54, respectively.
4.4.2 Group B inspection. Group B inspection shall be in accordance with table II of MIL-PRF-38535.
4.4.3 Group C inspection. Group C inspection shall be in accordance with table IV of MIL-PRF-38535 and as
follows:
a. End-point electrical parameters shall be as specified in table II herein. Delta limits shall apply only to
subgroup 1 of group C inspection and shall consist of tests specified in table IV herein.
b. The steady-state life test duration, test condition, and test temperature, or approved alternatives shall be
as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test
circuit shall be maintained under document control by the device manufacturer's Technology Review
Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or
preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power
dissipation, as applicable, in accordance with the intent specified in test method 1005 of MIL-STD-883.
c. When device types 01 through 04 are qualified by extension (see 4.3.1), these device types will be
inspected (QCI) according to the requirements for device types 51 through 54, respectively.
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