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ICS650-36 fiches techniques PDF

Integrated Circuit Systems - Networking & PCI Clock Source

Numéro de référence ICS650-36
Description Networking & PCI Clock Source
Fabricant Integrated Circuit Systems 
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ICS650-36 fiche technique
ICS650-36
Networking & PCI Clock Source
Description
The ICS650-36 is a low cost frequency generator
designed to support networking and PCI applications.
Using analog/digital Phase Locked-Loop (PLL)
techniques, the device uses a standard fundamental
mode, inexpensive crystal input of 25 MHz to produce
four output clocks supporting LAN, PCI, and 100M
SDRAM functions.
The device also has a power down feature that
tri-states the clock outputs and turns off the PLL when
the PDTS pin is taken low.
Features
Packaged in 16-pin TSSOP
Available in Pb (lead) free package
Replaces multiple crystals and oscillators
Input crystal or clock frequency of 25 MHz
Fixed reference output frequency of 25 MHz
Selectable output frequencies of 33.3, 33.333, 50,
66.666, 100, and 125 MHz
Duty cycle of 40/60
Operating voltage of 3.3 V
Advanced, low-power CMOS process
Industrial and commercial temperature ranges
Block Diagram
3
S2:0
Select/
Control
Circuit
X1/ICLK
25 MHz
crystal
input X2
Crystal
Oscillator/
Clock
Buffer
External capacitors
may be required.
VDD
3
PLL1
PLL2
CLK1
CLK2
PLL3
3
GND
CLK3
REF
PDTS (all outputs and PLLs)
MDS 650-36 D
1
Revision 030206
Integrated Circuit Systems 525 Race Street, San Jose, CA 95126 tel (408) 297-1201www.icst.com

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