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PDF ICS650-12 Data sheet ( Hoja de datos )
| Número de pieza | ICS650-12 | |
| Descripción | MPEG Clock Synthesizer | |
| Fabricantes | Integrated Circuit Systems | |
| Logotipo |  |
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ICS650-12
MPEG Clock Synthesizer
Description
The ICS650-12 is a low cost, low jitter, high
performance clock synthesizer designed to
produce fixed clock outputs of 13.5 MHz and
27.0 MHz and four selectable clock outputs of two
Processor Clocks (PCLK1 and PCLK2), Audio
Clock (ACLK), and Communications Clock
(CCLK). Using our patented analog Phase-
Locked Loop (PLL) techniques, the device uses a
27.0 MHz clock or fundamental crystal input to
produce clocks ideal for Digital Video/MPEG-
based applications.
Features
• Packaged in 20 pin tiny SSOP (QSOP)
• Input Frequency of 27.0 MHz
• Zero ppm synthesis error in output clocks
• Provides fixed 13.5 MHz and 27.0 MHz.
Also provides two selectable Processor Clocks,
one Audio Clock, and one Communications Clock
• Ideal for Digital Video/MPEG-based applications
• 3.3 V or 5.0 V operating voltage
• Entire chip powers down (when CS1=CS0=0)
Block Diagram
PS2:0
AS2:0
CS1:0
27.0 MHz
crystal or
clock
Input
Buffer/Crystal
Oscillator
Clock
Synthesis
and
Control
Circuitry
Output
Buffer
Output
Buffer
Output
Buffer
Output
Buffer
Output
Buffer
÷2
Output
Buffer
PCLK1
PCLK2
ACLK
CCLK
13.5 MHz
27.0 MHz
MDS 650-12 A
1
Revision 113000
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com
www.DataSheet4U.com
1 page | ||
| Páginas | Total 4 Páginas | |
| PDF Descargar | [ Datasheet ICS650-12.PDF ] | |
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