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PDF SDA4330-2X Data sheet ( Hoja de datos )
| Número de pieza | SDA4330-2X | |
| Descripción | SDA4330-2X | |
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SDA 4330-2X
1 Overview
1.1 Features
• 155 MHz FM and 40 MHz AM input frequency
• 30 mVeff AM and 50 mVeff FM sensitivity
• 16 bit IF counter up to 50 MHz
• Additional open drain ports controlled by I2C
• 2-pin quartz oscillator
• Fast phase detector with short anti-backlash pulses
P-DSO-24-1
and polarity reversal
• Charge pump current programmable in four steps up to 4.5 mA
• Frequency resolution of 1, 5 and 10 kHz AM and 12.5, 25 and 50 kHz FM
• P-DSO-24 package
Type
SDA 4330-2X
Ordering Code
Q67100-H5140
Package
P-DSO-24-1
1.2 Application
The SDA 4330-2X provides separated input and output ports for AM and FM and is well
suited for extremely fast loop settling times in the FM mode.
Semiconductor Group
www.DataSheet4U.com
1
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04.96
1 page  
SDA 4330-2X
2 Functional Description
The SDA 4330-2X is a radio PLL controlled via I2C Bus for frequency synthesis in the
AM and FM range. It includes an IF counter up to 50 MHz enabling a precise search
tuning stop.
3 Circuit Description
The reference frequency for the PLL is derived from the quartz oscillator OSC1). The
R-prescaler can be adapted to quartz frequencies of 4, 8 or 10.25 MHz, respectively,
yielding an internal 50 kHz reference. Programming the R-counter sets the phase
detector reference frequency to 1, 5 or 10 kHz in the AM mode or to 12.5, 25 or 50 kHz
in the FM mode. The VCO frequency is set by programming the A/N-counter which
operates as dual-modulus counter for FM and AM using a divide by 4/5 swallow counter.
The phase detector drives two different charge pumps for AM and FM mode. Additional
source followers are connected to the charge pump. There are four programmable
current levels for each charge pump. The supply voltage for the charge pump and the
source followers is supplied via the VDD2-pin and can reach 10 V maximum. AM/FM is an
open drain output as well as the additional outputs SA1 … SA4 which are controlled by
I2C Bus.
The IF counter is activated by the IF bit of the I2C status word. In the FM mode the IFFM
signal is divided by 2 or 4 in the F-counter in the AM mode the IFAM input is switched
directly to the gate. The G-counter provides four different gate intervals TG of 2, 4, 8, or
20 ms respectively. During this interval the D-counter counts up from zero and after
closing the gate its content Z is transferred into the D-register where it can be read from
the I2C Bus. The IF frequency is given by
fIFFM = Z
--------1-------- ;
F × TG
F=
12-- ,
1-4-
fIFAM
=
Z
---1---
TG
The relations between gate interval, resolution and measurement range are given in
table 1.
After being started by setting the IF bit the count-cycle is repeated continuously and the
content of the D-register is updated after each cycle. So the first valid result in the
D-register can be expected one gate length after starting with an additional delay of
1) The power dissipation of the quartz is given by:
Pv = 2 × R1 (Π × fQ × (CO + CL) × VDD)2
R1: Series resistance of the quartz
fQ : Quartz frequency
CO: Parallel capacitance of the quartz
CL: Load capacitance, including input capacitance of the IC
Semiconductor Group
5
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5 Page 
SDA 4330-2X
4.3 AC/DC Characteristics (cont’d)
Parameter
Symbol Limit Values Unit
min. typ. max.
Test Condition
Output PDFMA
H-output voltage
H-output current
L-output current
VQH 7.5 7.7
V IQH = 2 mA
VPDFM = VDD2 = 9 V
IQH 2 5 mA VPDFM = VDD2 = 9 V
IQL 10
µA VPDFM = GND
Output PDAMA
H-output voltage
IQH
1 2.5 mA VPDAM = 5 V
L-output current IQL t.b.d.
mA VPDAM = GND
VQ = 5 V
Note: The listed characteristics are ensured over the operating range of the integrated
circuit. Typical characteristics specify mean values expected over the production
spread. If not otherwise specified, typical characteristics apply at TA = 25 °C and
the given supply voltage.
Semiconductor Group
11
04.96
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