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PDF ICS1726-11 Data sheet ( Hoja de datos )
| Número de pieza | ICS1726-11 | |
| Descripción | Low EMI Clock Generator | |
| Fabricantes | Integrated Circuit Systems | |
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PRELIMINARY INFORMATION
ICS1726-11
Low EMI Clock Generator
Description
The ICS1726-11 generates a low EMI output clock
from a clock or crystal input. The part is designed to
dither the LCD interface clock for PDAs, printers,
scanners, modems, copiers, and others. Using ICS’
proprietary mix of analog and digital Phase-Locked
Loop (PLL) technology, the device spreads the
frequency spectrum of the output, reducing the
frequency amplitude peaks by several dB. The
ICS1726-11 offers both centered and down spread
from a high-speed clock input.
ICS offers many other clocks for computers and
computer peripherals. Consult us when you need to
remove crystals and oscillators from your board.
Features
• Packaged in 8-pin SOIC/TSSOP
• Provides a spread spectrum output clock
• Supports flat panel controllers
• Accepts a clock or crystal input (provides same
frequency dithered output)
• Input frequency range of 16 to 32 MHz
• Output frequency range of 16 to 32 MHz
• Center and down spread
• Peak reduction by 8 dB to 16 dB typical on 3rd
through 19th odd harmonics
• Low EMI feature can be disabled
• Includes power down
• Operating voltage of 3.3 V
• Advanced, low-power CMOS process
Block Diagram
VDD
S1:0 2
Spread Direction
X1/CLK
X2
Clock Buffer/
Crystal
Ocsillator
External caps required for with crystal
for accurate tuning of the clock
PLL Clock
Synthesis
and Spread
Spectrum
Circuitry
X1
GND
SSCLK
www.DataSheet4U.com
MDS 1726-11 A
1
Revision 092905
wInwtewg.rDaatetadSChierceut4itUS.cyosmtems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
1 page  
PRELIMINARY INFORMATION
ICS1726-11
Low EMI Clock Generator
Parameter
Output Low Voltage
Input Capacitance
Symbol
Conditions
VOL
CIN1
CIN2
IOL = -4 mA
IOL = -10 mA
S0, S1, FRSEL pins
X1, X2 pins
Min.
Typ.
4
6
Max.
0.4
1.2
6
9
Units
V
V
pF
pF
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V, Ambient Temperature 0 to +70° C
Parameter
Symbol
Conditions
Min.
Input Clock Frequency
16
Output Clock Frequency
16
Input Clock Duty Cycle
Time above VDD/2
40
Output Clock Duty Cycle
Time above 1.5 V
45
Cycle to cycle Jitter
Fin=4 MHz, Fout=4
MHz
Cycle to cycle Jitter
Fin=27 MHz,
Fout=27 MHz
Output Rise Time
tR 0.4 to 2.4 V
Output Fall Time
tF 2.4 to 0.4 V
EMI Peak Frequency Reduction
2.4
2.4
Typ.
50
675
Max. Units
32 MHz
32 MHz
60 %
55 %
800 ps
200 450 ps
3.2
3.2
8 to 16
4.0
4.0
ns
ns
dB
Thermal Characteristics
Parameter
Symbol Conditions
Thermal Resistance Junction to
Ambient
θJA Still air
θJA 1 m/s air flow
θJA 3 m/s air flow
Thermal Resistance Junction to Case θJC
Min.
Typ.
150
140
120
40
Max.
Units
°C/W
°C/W
°C/W
°C/W
MDS 1726-11 A
5
Revision 092905
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet ICS1726-11.PDF ] | |
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