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TC55V328J fiches techniques PDF

Toshiba - 8-Bit CMOS SRAM

Numéro de référence TC55V328J
Description 8-Bit CMOS SRAM
Fabricant Toshiba 
Logo Toshiba 





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TC55V328J fiche technique
TOSHIBA
SILICON GATE CMOS
1l:55V328}20/25/35
PRELIMINARY
32,768 WORD x 8 BIT CMOS STATIC RAM
Description
The TC55V328J is a 262,144 bit CMOS high speed static random access memory organized as 32,768 words by 8 bits and
designed to operate from a single 3.3V supply. Toshiba's advanced CMOS technology and circuit design enable high speed, low
voltage operation.
The TC55V328J features low power dissipation when the SRAM is deselected using chip enable (CE) and has an output
enable input (OE) for fast memory access. It is suitable for use in high speed applications such as cache memory. All inputs and
outputs are LVTTL (low voltage TIL) compatible.
The TC55V328J is available in a 28-pin, 300mil SOJ package suitable for high density assembly.
Features
Pin Connection (Top View)
• Fast access time
- TC55V328J-20
- TC55V328J-25
- TC55V328J-35
• Low power dissipation
20ns (max.)
25ns (max.)
35ns (max.)
- Operation:
- TC55V328J-20 70mA (max.)
- TC55V328J-25 70mA (max.)
- TC55V328J-35 70mA (max.)
- Standby:
300~ (max.)
• Fully static operation
• Single power supply: 3.3V ±O.3V
• Output buffer control: OE
• Inputs and outputs:
- LVTTL compatible
• Package:
- TC55V328J: SOJ28-P-300A
Pin Names
AD - A14
1/01 - 1/08
Address Inputs
Data Inputs/Outputs
TC55V328J
A14
A12
A7
A6
AS
A4 All
A3 ~
aA2 Al0
Al
AO 1108
1/01 1/07
1/02 1/06
1103 1/05
1104
(SOJ)
CE Chip Enable Input
WE Write Enable Input
OE Output Enable Input
VDD
GND
Power (+3.3V)
Ground
TOSHIBA AMERICA ELECTRONIC COMPDNENTS, INC.
8-73

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