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PDF JAN2N2919 Data sheet ( Hoja de datos )
| Número de pieza | JAN2N2919 | |
| Descripción | (JAN2N2919 / JAN2N2920) Transistor | |
| Fabricantes | New England Semiconductor | |
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The documentation and process conversion
measures necessary to comply with this document
shall be completed by 3 October 2005.
INCH-POUND
MIL-PRF-19500/355K
3 July 2005
SUPERSEDING
MIL-PRF-19500/355J
8 July 2004
PERFORMANCE SPECIFICATION SHEET
SEMICONDUCTOR DEVICE, UNITIZED DUAL TRANSISTOR, NPN, SILICON,
TYPES 2N2919, 2N2920, 2N2919L, 2N2920L, 2N2919U, AND 2N2920U,
JAN, JANTX, JANTXV, JANS, JANHC, AND JANKC
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product described herein shall consist of
this specification sheet and MIL-PRF-19500.
1. SCOPE
1.1 Scope. This specification covers the performance requirements for two electrically isolated, matched NPN
silicon transistors as one dual unit. Four levels of product assurance are provided for each device type as specified
in MIL-PRF-19500. Two levels of product assurance are provided for die.
1.2 Physical dimensions. See figure 1 (similar to TO-78), figure 2 (surface mount), figure 3 (JANHCA and
JANKCA die), figure 4 (JANHCB and JANKCB die).
* 1.3 Maximum ratings, unless otherwise specified, TC =+25°C.
PT (1)
TA = +25°C
PT (2)
TC = +25°C
IC
VCBO
VCEO
VEBO
One Both One Both
section sections section sections
TJ and TSTG
mW mW
mW
W mA V dc V dc V dc
°C
dc
300 600 750 1.25
70 60 6 -65 to +200
30
(1) For TA > +25°C, derate linearly 1.71 mW/°C, one section; 3.43 mW/°C, both sections.
(2) For TC > +25°C, derate linearly 4.286 mW/°C, one section; 7.14 mW/°C, both sections.
* Comments, suggestions, or questions on this document should be addressed to Defense Supply Center,
Columbus, ATTN: DSCC-VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to
[email protected]. Since contact information can change, you may want to verify the currency of this
address information using the ASSIST Online database at http://assist.daps.dla.mil .
AMSC N/A
FSC 5961
www.DataSheet4U.com
1 page  
MIL-PRF-19500/355K
NOTES:
1. Chip size................................................. .015 x .019 inch ±.001 inch (0.381 x 0.4826 mm ±0.0254 mm).
2. Chip thickness ........................................ .010 ±.0015 inch (0.254 ±0.0381 mm).
3. Top metal ............................................... Aluminum 15,000Å minimum, 18,000Å nominal.
4. Back metal.............................................. A. Gold 2,500Å minimum, 3,000Å nominal.
B. Eutectic Mount - No Gold.
5. Backside................................................. Collector.
6. Bonding pad ........................................... B = .003 inch (0.0762 mm), E = .004 inch (0.1016 mm) diameter.
7. Passivation ............................................. Si3N4 (Silicon Nitride) 2 kÅ min, 2.2 kÅ nom.
FIGURE 3. Physical dimensions (JANHCA and JANKCA die).
5
5 Page 
MIL-PRF-19500/355K
* 4.4.3.2 Group C inspection, table VII (JAN, JANTX, and JANTXV) of MIL-PRF-19500.
Subgroup Method Condition
C2 2036 Test condition E, not applicable to surface mount.
C5 3131 RθJA and RθJC only, as applicable (see 1.3) and in accordance with thermal impedance
curves.
C6 Not applicable.
4.4.3.3 Group C sample selection. Samples for subgroups in group C shall be chosen at random from any
inspection lot containing the intended package type and lead finish procured to the same specification which is
submitted to and passes table I tests herein for conformance inspection. When the final lead finish is solder or any
plating prone to oxidation at high temperature, the samples for C6 life test may be pulled prior to the application of
final lead finish. Testing of a subgroup using a single device type enclosed in the intended package type shall be
considered as complying with the requirements for that subgroup.
* 4.4.4 Group E inspection. Group E inspection shall be conducted in accordance with the conditions specified for
subgroup testing in table IX of MIL-PRF-19500 and as specified in table II herein. Electrical measurements (end-
points) shall be in accordance with table I, subgroup 2 herein; delta measurements shall be in accordance with the
applicable steps of 4.5.8.
4.5 Methods of inspection. Methods of inspection shall be as specified in the appropriate tables and as follows.
4.5.1 Pulse measurements. Conditions for pulse measurement shall be as specified in section 4 of
MIL-STD-750.
4.5.2 Testing of units. All specified electrical tests, including end-point tests, shall be performed equally on both
sections of the transistor types covered herein, except where the electrical characteristic being evaluated applies to
the transistor as a device entity.
4.5.3 Disposition of leads when testing characteristics of each section. During the measurement of the
characteristics of each section, the leads of the section not under test shall be open-circuited.
4.5.4 Forward-current-gain ratio. The value for the forward-current-gain ratio for each individual section of a dual
unit shall be measured using method 3076 of MIL-STD-750. The forward-current-gain ratio shall be calculated by
dividing one of the values by the other. If possible, this ratio shall be measured directly to improve accuracy.
4.5.5 Base-emitter-voltage differential. The base-emitter-voltage differential shall be determined by connecting
the emitters of the individual sections together, applying specified electrical test conditions to each individual section
in accordance with method 3066 of MIL-STD-750, test condition B, and measuring the absolute value of the voltage
between the bases of the individual sections of a dual unit.
4.5.6 Base-emitter-voltage differential change with temperature. The value of the base-emitter-voltage differential
shall be measured at the two specified temperatures in accordance with 4.5.5 except that the polarities of the
differentials and identities of the individual sections shall be maintained. The absolute value of the algebraic
difference between the values at the two temperature extremes shall be calculated. A mathematical formula for this
parameter is:
|(VBE1 (T1) - VBE2 (T1)) - (VBE1 (T2) - VBE2 (T2)) |
11
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| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet JAN2N2919.PDF ] | |
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