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PDF EDE5104ABSE Data sheet ( Hoja de datos )

Número de pieza EDE5104ABSE
Descripción (EDE51xxABSE) 512M bits DDR2 SDRAM
Fabricantes Elpida Memory 
Logotipo Elpida Memory Logotipo



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DATA SHEET
512M bits DDR2 SDRAM
EDE5104ABSE (128M words × 4 bits)
EDE5108ABSE (64M words × 8 bits)
EDE5116ABSE (32M words × 16 bits)
Description
The EDE5104ABSE is a 512M bits DDR2 SDRAM
organized as 33,554,432 words × 4 bits × 4 banks.
The EDE5108ABSE is a 512M bits DDR2 SDRAM
organized as 16,777,216 words × 8 bits × 4 banks.
They are packaged in 64-ball FBGA (µBGA) package.
The EDE5116ABSE is a 512M bits DDR2 SDRAM
organized as 8,388,608 words × 16 bits × 4 banks.
It is packaged in 84-ball FBGA (µBGA) package.
Features
Power supply: VDD, VDDQ = 1.8V ± 0.1V
Double-data-rate architecture: two data transfers per
clock cycle
Bi-directional, differential data strobe (DQS and
/DQS) is transmitted/received with data, to be used in
capturing data at the receiver
DQS is edge aligned with data for READs: center-
aligned with data for WRITEs
Differential clock inputs (CK and /CK)
DLL aligns DQ and DQS transitions with CK
transitions
Commands entered on each positive CK edge: data
and data mask referenced to both edges of DQS
Four internal banks for concurrent operation
Data mask (DM) for write data
Burst lengths: 4, 8
/CAS Latency (CL): 3, 4, 5
Auto precharge operation for each burst access
Auto refresh and self refresh modes
7.8µs average periodic refresh interval
SSTL_18 compatible I/O
Posted CAS by programmable additive latency for
better command and data bus efficiency
Off-Chip-Driver Impedance Adjustment and On-Die-
Termination for better signal quality
Programmable RDQS, /RDQS output for making × 8
organization compatible to × 4 organization
/DQS, (/RDQS) can be disabled for single-ended
Data Strobe operation.
FBGA (µBGA) package with lead free solder
(Sn-Ag-Cu)
RoHS compliant
Document No. E0323E90 (Ver. 9.0)
Date Published September 2005 (K) Japan
Printed in Japan
URL: http://www.elpida.com
Elpida Memory, Inc. 2002-2005

1 page




EDE5104ABSE pdf
EDE5104ABSE, EDE5108ABSE, EDE5116ABSE
Electrical Specifications
Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit Notes
Power supply voltage
VDD
1.0 to +2.3
V1
Power supply voltage for output
VDDQ
0.5 to +2.3
V1
Input voltage
VIN 0.5 to +2.3
V1
Output voltage
VOUT
0.5 to +2.3
V1
Storage temperature
Tstg 55 to +100
°C 1, 2
Power dissipation
PD 1.0
W1
Short circuit output current
IOUT
50
mA 1
Notes: 1. Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect reliability.
2. Storage temperature is the case surface temperature on the center/top side of the DRAM.
Caution
Exposing the device to stress above those listed in Absolute Maximum Ratings could cause
permanent damage. The device is not meant to be operated under conditions outside the limits
described in the operational section of this specification. Exposure to Absolute Maximum Rating
conditions for extended periods may affect device reliability.
Operating Temperature Condition
Parameter
Symbol
Rating
Unit Notes
Operating case temperature
TC
0 to +85
°C 1, 2
Notes: 1. Operating temperature is the case surface temperature on the center/top side of the DRAM.
2. The operation temperature range is the temperature where all DRAM specification will be supported. Out
side of this temperature range, even it is still within the limit of stress condition, some deviation on portion
of operation specification may be required.
During operation, the DRAM case temperature must be maintained between 0 to +85°C under all other
specification parameters.
Data Sheet E0323E90 (Ver. 9.0)
5

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EDE5104ABSE arduino
EDE5104ABSE, EDE5108ABSE, EDE5116ABSE
Pin Capacitance (TA = 25°C, VDD, VDDQ = 1.8V ± 0.1V)
Parameter
Symbol Pins
CLK input pin capacitance
CCK CK, /CK
Input pin capacitance
Input/output pin capacitance
CIN
CI/O
/RAS, /CAS,
/WE, /CS,
CKE, ODT,
Address
DQ, DQS, /DQS,
UDQS, /UDQS,
LDQS, /LDQS,
RDQS, /RDQS,
DM, UDM, LDM
Notes: 1. Matching within 0.25pF.
2. Matching within 0.50pF.
min.
1.0
1.0
3.0
max.
2.0
2.0
Unit Notes
pF 1
pF 1
4.0 pF 2
Data Sheet E0323E90 (Ver. 9.0)
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