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PDF EL9200 Data sheet ( Hoja de datos )
| Número de pieza | EL9200 | |
| Descripción | (EL9200 - EL9202) Programmable VCOM | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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®
Data Sheet
EL9200, EL9201, EL9202
April 7, 2005
FN7438.0
Programmable VCOM
Features
The EL9200, EL9201, and EL9202 represent programmable
• 128 step adjustable sink current
VCOM amplifiers for use in TFT-LCD displays. Featuring 1,
2, and 4 channels of VCOM amplification, respectively, each
device features just a single programmable current source
• EEPROM memory
• 2-pin adjustment and disable
for adding offset to one VCOM output. This current source is
• Single, dual or quad amplifiers
programmable using a single wire interface to one of 128
- 44MHz bandwidth
levels. The value is stored on an internal EEPROM memory.
The EL9200 is available in the 12-pin DFN package and the
EL9201 and EL9202 are available in 24-pin QFN packages.
mAll are specified for operation over the -40°C to +85°C
otemperature range.
.cTypical Block Diagram
t4UVSD
AVDD
eeCE
VS+ INN
-
+
EEPROM
RF RG
VOUT
INP
GND
AVDD
R1
R2
ShCTL
CONTROL
taGND
UP/DOWN
COUNTER
ANALOG
POT
IOUT
SET
RSET
- 80V/µs slew rate
- 60mA continuous output
- 180mA peak output
• Up to 18V operation
• 2.6V to 3.6V logic control
• Pb-free available (RoHS compliant)
Applications
• TFT-LCD VCOM supplies for
- LCD-TVs
- LCD monitors
www.Da www.DataSheet4U.com1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2005. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
1 page  
Pin Descriptions
PIN
VINX-
IN/OUT
Input
EL9200, EL9201, EL9202
DESCRIPTION
Amplifier X inverting input, where:
X = A for EL9200
X = A, B for EL9201
X = A, B, C, D for EL9202
EQUIVALENT CIRCUIT
VS+
VINX+
VS+
VOUTX
NC
GND
IOUT
SET
CE
CTL
AVDD
VSD
Input
Supply
Output
-
Supply
Output
Output
Input
Input
Supply
Supply
Amplifier X non-inverting input, where:
X = A for EL9200
X = A, B for EL9201
X = A, B, C, D for EL9202
Op amp supply; bypass to GND with 0.1µF capacitor
Amplifier X output, where:
X = A for EL9200
X = A, B for EL9201
X = A, B, C, D for EL9202
CIRCUIT 1
Reference Circuit 1
GND
VS+
No connect; not internally connected
Ground connection
Adjustable sink current output pin; the current sinks into the
OUT pin is equal to the DAC setting times the maximum
adjustable sink current divided by 128; see SET pin function
description for the maxim adjustable sink current setting
Maximum sink current adjustment point; connect a resistor
from SET to GND to set the maximum adjustable sink
current of the OUT pin; the maximum adjustable sink
current is equal to (AVDD/20) divided by RSET
Counter enable pin; connect CE to VDD to enable counting
of the internal counter; connect CE to GND to inhibit
counting
Internal counter up/down control and internal EEPROM
programming control input; if CE is high, a mid-to-low
transition increments the 7-bit counter, raising the DAC
setting, increasing the OUT sink current, and lowering the
divider voltage at OUT; a mid-to-high transition decrements
the 7-bit counter, lowering the DAC setting, decreasing the
OUT sink current, and increasing the divider voltage at
OUT; applying 4.9V and above with appropriately arranged
timing will overwrite EEPROM with the contents in the 7-bit
counter; see EEPROM Programming section for details
analog voltage supply; bypass to GND with 0.1µF
capacitor
System power supply input; bypass to GND with 0.1µF
capacitor
GND
GND
CIRCUIT 2
5 FN7438.0
April 7, 2005
5 Page 
EL9200, EL9201, EL9202
more than 200µs. The output sink current will decrease and
the VCOM level will increase by one LSB.
To avoid unintentional adjustment, the EL9200, EL9201, and
EL9202 guarantees to reject CTL pulses shorter than 20µs.
Since the internal comparators come up in an unknown
state, the very first CTL pulse is ignored to avoid the
possibility of a false pulse.
See Figure 27 for the timing information.
TABLE 1. TRUTH TABLE
INPUT
OUTPUT
CTL
CE
VDD
SET
ICC MEMORY
Mid to Hi
Hi
VDD
Decrement
Normal
X
Mid to Lo
Hi
VDD
Increment
Normal
X
X
Lo
VDD
No Change
Lower
X
> 4.9V
X
VDD
No Change
Increased
Program
X
X
0 to VDD
Read
Increased
Read
NOTE: CE should be disabled (pulled low) before powering down the device to assure that the glitches and transients will not cause unwanted
EEPROM overwriting.
CTL
CTL HIGH
VDD/2
CTL LOW
CTLIHMPW
CE
CTLMTC
CTLIHRPW
CTLILMPW
CTLILRPW
COUNTER
OUTPUT
VCOM
UNDEF
78
79 7A 7B
7A
FIGURE 27. VCOM ADJUSTMENT
11 FN7438.0
April 7, 2005
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet EL9200.PDF ] | |
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