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PDF DS12R885 Data sheet ( Hoja de datos )

Número de pieza DS12R885
Descripción (DS12xxx) RTC
Fabricantes Maxim Integrated Products 
Logotipo Maxim Integrated Products Logotipo



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No Preview Available ! DS12R885 Hoja de datos, Descripción, Manual

Rev 2; 12/04
RTC with Constant-Voltage Trickle Charger
General Description
Features
The DS12R885 is a functional drop-in replacement for
the DS12885 real-time clock (RTC). The device pro-
vides an RTC/calendar, one time-of-day alarm, three
maskable interrupts with a common interrupt output, a
Trickle-Charge Capability for a Rechargeable
Battery or Super Cap
Selectable Intel or Motorola Bus Timing
programmable square wave, and 114 bytes of battery- RTC Counts Seconds, Minutes, Hours, Day, Date,
backed static RAM. The date at the end of the month is
Month, and Year with Leap-Year Compensation to
automatically adjusted for months with fewer than 31
days, including correction for leap years. It also oper-
ates in either 24-hour or 12-hour format with an AM/PM
mindicator. A precision temperature-compensated circuit
monitors the status of VCC. If a primary power failure is
odetected, the device automatically switches to a back-
.cup supply. The VBACKUP pin supports a rechargeable
battery or a super cap and includes an integrated,
always enabled trickle charger. The DS12R885 is
accessed through a multiplexed byte-wide interface,
Uwhich supports both Intel and Motorola modes. The
t4DS12CR887 and DS12R887 integrate the DS12R885
die with a crystal and battery.
eApplications
Embedded Systems
eUtility Meters
hSecurity Systems
Network Hubs, Bridges, and Routers
taSTypical Operating Circuit
aCRYSTAL
VCC
www.D t4U.comDS83C520
X1 X2
AS
VCC
RESET
R/W RCLR
DS
CS DS12R885
AD(0–7)
SQW
IRQ VBACKUP
MOT
GND
SUPER
± CAP
2100
Interrupt Output with Three Independently
Maskable Interrupt Flags
Time-of-Day Alarm is Once-per-Second to Once-
per-Day
Periodic Rates from 122µs to 500ms
End-of-Clock Update Cycle Flag
14 Bytes of Clock and Control Registers
114 Bytes of General-Purpose RAM with Clear Input
Programmable Square-Wave Output
Automatic Power-Fail Detect and Switch Circuitry
+5.0V or +3.3V Operation
Industrial Temperature Range
DS12CR887 Encapsulated DIP (EDIP) Module with
Integrated Battery and Crystal
DS12R887 BGA Module Surface-Mountable
Package with Integrated Crystal and Rechargeable
Battery
Ordering Information
PART
TEMP RANGE
PIN-
PACKAGE
TOP MARK
DS12R885-5
-40°C to +85°C
24 SO
(300 mils)
DS12R885-5
DS12R885-33
-40°C to +85°C
24 SO
(300 mils)
DS12R885-33
DS12CR887-5 -40°C to +85°C 24 EDIP DS12CR887-5
(700 mils)
DS12CR887-33 -40°C to +85°C 24 EDIP DS12CR887-33
(700 mils)
DS12R887-5 -40°C to +85°C 48 BGA DS12R887-5
DS12R887-33 -40°C to +85°C 48 BGA DS12R887-33
taSheePin Configurations appear at end of data sheet.
.Da______________________________________________ Maxim Integrated Products 1
wwFor pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
w1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

1 page




DS12R885 pdf
RTC with Constant-Voltage Trickle Charger
AS
DS
R/ W
CS
AD0–AD7
WRITE
AD0–AD7
READ
tASD
Motorola Bus Read/Write Timing
PWASH
PWEL
tASED
tCYC
PWEH
tRWS
tCS
tASL tAHL
tDSW
tDDR
tRWH
tCH
tDHW
tDHR
Intel Bus Write Timing
AS
DS
R/W
CS
AD0–AD7
WRITE
PWASH
tASD
tASD
PWASL
tASL
tCYC
tCS
tAHL
PWEH
tDSW
tCH
tDHW
_____________________________________________________________________ 5

5 Page





DS12R885 arduino
RTC with Constant-Voltage Trickle Charger
Pin Description (continued)
PIN
NAME
SO EDIP BGA
FUNCTION
Reset Input. The RESET pin has no effect on the clock, calendar, or RAM. On power-up,
the RESET pin can be held low for a time to allow the power supply to stabilize. The
amount of time that RESET is held low is dependent on the application. However, if RESET
is used on power-up, the time RESET is low should exceed 200ms to ensure that the
internal timer that controls the DS12R885 on power-up has timed out. When RESET is low
and VCC is above VPF, the following occurs:
A. Periodic interrupt-enable (PIE) bit is cleared to 0.
B. Alarm interrupt-enable (AIE) bit is cleared to 0.
18
18
A2
RESET
C. Update-ended interrupt-enable (UIE) bit is cleared to 0.
D. Periodic-interrupt flag (PF) bit is cleared to 0.
E. Alarm-interrupt flag (AF) bit is cleared to 0.
F. Update-ended interrupt flag (UF) bit is cleared to 0.
G. Interrupt-request status flag (IRQF) bit is cleared to 0.
H. IRQ pin is in the high-impedance state.
I. The device is not accessible until RESET is returned high.
J. Square-wave output-enable (SQWE) bit is cleared to 0.
In a typical application, RESET can be connected to VCC. This connection allows the
DS12R885 to go in and out of power fail without affecting any of the control registers.
Interrupt Request Output. The IRQ pin is an active-low output of the DS12R885 that can be
used as an interrupt input to a processor. The IRQ output remains low as long as the
status bit causing the interrupt is present and the corresponding interrupt-enable bit is set.
19
19
A4
IRQ
The processor program normally reads the C register to clear the IRQ pin. The RESET pin
also clears pending interrupts. When no interrupt conditions are present, the IRQ level is in
the high-impedance state. Multiple interrupting devices can be connected to an IRQ bus,
provided that they are all open drain. The IRQ pin is an open-drain output and requires an
external pullup resistor to VCC.
20 —
VBACKUP
Connection for Rechargeable Battery or Super Cap. This pin provides trickle charging
when VCC is greater than VBACKUP.
RAM Clear. The active-low RCLR pin is used to clear (set to logic 1) all 114 bytes of
general-purpose RAM, but does not affect the RAM associated with the RTC. To clear the
21
A5
RCLR
RAM, RCLR must be forced to an input logic 0 during battery-backup mode when VCC is
not applied. The RCLR function is designed to be used through a human interface
(shorting to ground manually or by a switch) and not to be driven with external buffers.
This pin is internally pulled up. Do not use an external pullup resistor on this pin.
Square-Wave Output. The SQW pin can output a signal from one of 13 taps provided by
the 15 internal divider stages of the RTC. The frequency of the SQW pin can be changed
23 23 C4 SQW by programming Register A, as shown in Table 1. The SQW signal can be turned on and
off using the SQWE bit in Register B. The SQW signal is not available when VCC is less
than VPF.
A6–A8,
DC Power Pin for Primary Power Supply. When VCC is applied within normal limits, the
24 24 B1–B8, VCC device is fully accessible and data can be written and read. When VCC is below VPF reads
C6–C8
and writes are inhibited.
____________________________________________________________________ 11

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