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PDF DP83848YB Data sheet ( Hoja de datos )
| Número de pieza | DP83848YB | |
| Descripción | PHYTER - Extreme Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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Janusry 2006
DP83848YB PHYTER® - Extreme Temperature
Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver
General Description
Features
The number of applications requiring ethernet connec- • Extreme Temperature from -40 °C to 125 °C
tivity continues to increase. Along with this increased • Low-power 3.3V, 0.18µm CMOS technology
market demand is a change in application require-
ments. The DP83848YB was designed to allow ether-
•
Low power consumption < 270mW Typical
net connectivity in the harshest environments. Our • 3.3V MAC Interface
device meets IEEE 802.3u standards over an • Auto-MDIX for 10/100 Mb/s
EXTREME temperature range of -40°C to 125 °C. This • Energy Detection Mode
device is ideally suited for harsh environments for
example wireless remote base stations, automo-
•
25 MHz clock out
tive/transportation and industrial control applications. • SNI Interface (configurable)
The DP83848YB is a highly reliable, feature rich robust • RMII Rev. 1.2 Interface (configurable)
device which includes enhanced ESD protection, MII • MII Serial Management Interface (MDC and MDIO)
and RMII for maximum flexibility in MPU selection all in
a 48 pin LQFP package.
•
IEEE 802.3u MII
• IEEE 802.3u Auto-Negotiation and Parallel Detection
With the DP83848YB NATIONAL continues to build on
its Ethernet expertise and leadership position by pro-
•
IEEE 802.3u ENDEC, 10BASE-T transceivers and filters
viding the flexibility allowing for ease of implementation • IEEE 802.3u PCS, 100BASE-TX transceivers and filters
by the end user.
• IEEE 1149.1 JTAG
The DP83848YB features integrated sublayers to sup- • Integrated ANSI X3.263 compliant TP-PMD physical sub-
port both 10BASE-T and 100BASE-TX Ethernet proto- layer with adaptive equalization and Baseline Wander com-
cols, which ensures compatibility and interoperability pensation
with all other standards based Ethernet solutions.
• Error-free Operation up to 150 meters
Applications
• Programmable LED support Link, 10 /100 Mb/s Mode, Activ-
ity, and Collision Detect
• Automotive/Transportation
• Industrial Controls and Factory Automation
• General Embedded Applications
• Single register access for complete PHY status
• 10/100 Mb/s packet BIST (Built in Self Test)
• Lead free 48-pin LQFP package (7mm) x (7mm)
System Diagram
MPU/CPU
MII/RMII/SNI
DP83848YB
10/100 Mb/s
®
PHYTER is a registered trademark of National Semiconductor.
© 2006 National Semiconductor Corporation
25 MHz
Clock
Source
Status
LEDs
Typical Application
1
10BASE-T
or
100BASE-TX
www.national.com
1 page  
8.2.6 100BASE-TX Transmit Packet Latency Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
8.2.7 100BASE-TX Transmit Packet Deassertion Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
8.2.8 100BASE-TX Transmit Timing (tR/F & Jitter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
8.2.9 100BASE-TX Receive Packet Latency Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
8.2.10 100BASE-TX Receive Packet Deassertion Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
8.2.11 10 Mb/s MII Transmit Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
8.2.12 10 Mb/s MII Receive Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
8.2.13 10 Mb/s Serial Mode Transmit Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
8.2.14 10 Mb/s Serial Mode Receive Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
8.2.15 10BASE-T Transmit Timing (Start of Packet) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
8.2.16 10BASE-T Transmit Timing (End of Packet) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
8.2.17 10BASE-T Receive Timing (Start of Packet) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
8.2.18 10BASE-T Receive Timing (End of Packet) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
8.2.19 10 Mb/s Heartbeat Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
8.2.20 10 Mb/s Jabber Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
8.2.21 10BASE-T Normal Link Pulse Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
8.2.22 Auto-Negotiation Fast Link Pulse (FLP) Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
8.2.23 100BASE-TX Signal Detect Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
8.2.24 100 Mb/s Internal Loopback Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
8.2.25 10 Mb/s Internal Loopback Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
8.2.26 RMII Transmit Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
8.2.27 RMII Receive Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
8.2.28 Isolation Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
8.2.29 25 MHz_OUT Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
9.0 Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
5 www.national.com
5 Page 
1.3 Clock Interface
Signal Name
X1
Type
I
X2
25MHz_OUT
O
O
1.4 LED Interface
See Table 3 for LED Mode Selection.
Pin #
34
33
25
Description
CRYSTAL/OSCILLATOR INPUT: This pin is the primary clock
reference input for the DP83848YB and must be connected to a
25 MHz 0.005% (+50 ppm) clock source. The DP83848YB sup-
ports either an external crystal resonator connected across pins
X1 and X2, or an external CMOS-level oscillator source connect-
ed to pin X1 only.
RMII REFERENCE CLOCK: This pin is the primary clock refer-
ence input for the RMII mode and must be connected to a 50 MHz
0.005% (+50 ppm) CMOS-level oscillator source.
CRYSTAL OUTPUT: This pin is the primary clock reference out-
put to connect to an external 25 MHz crystal resonator device.
This pin must be left unconnected if an external CMOS oscillator
clock source is used.
25 MHz CLOCK OUTPUT:
In MII mode, this pin provides a 25 MHz clock output to the sys-
tem.
In RMII mode, this pin provides a 50 MHz clock output to the sys-
tem.
This allows other devices to use the reference clock from the
DP83848YB without requiring additional clock sources.
Signal Name
LED_LINK
LED_SPEED
LED_ACT/COL
Type
S, O, PU
S, O, PU
S, O, PU
Pin #
28
27
26
Description
LINK LED: In Mode 1, this pin indicates the status of the LINK.
The LED will be ON when Link is good.
LINK/ACT LED: In Mode 2 and Mode 3, this pin indicates transmit
and receive activity in addition to the status of the Link. The LED
will be ON when Link is good. It will blink when the transmitter or
receiver is active.
SPEED LED: The LED is ON when device is in 100 Mb/s and OFF
when in 10 Mb/s. Functionality of this LED is independent of mode
selected.
ACTIVITY LED: In Mode 1, this pin is the Activity LED which is
ON when activity is present on either Transmit or Receive.
COLLISION/DUPLEX LED: In Mode 2, this pin by default indi-
cates Collision detection. For Mode 3, this LED output may be
programmed to indicate Full-duplex status instead of Collision.
11 www.national.com
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet DP83848YB.PDF ] | |
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