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PDF RD38Fxxxxxx Data sheet ( Hoja de datos )
| Número de pieza | RD38Fxxxxxx | |
| Descripción | (RD38Fxxxx) Flash Memory | |
| Fabricantes | Intel Corporation | |
| Logotipo |  |
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U.com®
hMIeneette4ml orAyd(vCa3n)ced+ Boot Block FlashSCSP Family
.DataS Product Features
Datasheet
ww ■ Flash Memory Plus SRAM
w — Reduces Memory Board Space
mRequired, Simplifying PCB Design
Complexity
o■ SCSP Technology
.c—Smallest Memory Subsystem Footprint
— Area : 8 x 10 mm for 16 Mbit (0.13 µm)
Flash + 2 Mbit or 4 Mbit SRAM
U— Area : 8 x 12 mm for 32 Mbit (0.13 µm)
t4Flash + 4 Mbit or 8 Mbit SRAM
— Height : 1.20 mm for 16 Mbit (0.13 µm)
Flash + 2 Mbit or 4 Mbit SRAM, and 32
eMbit (0.13um) Flash + 8 Mbit SRAM
e— Height : 1.40 mm for 32 Mbit (0.13 µm)
Flash + 4 Mbit SRAM
h— This Family also includes 0.25 µm, 0.18
µm, and 0.13 µm technologies
S■ Advanced SRAM Technology
ta—70 ns Access Time
— Low Power Operation
a— Low Voltage Data Retention Mode
■ Intel® Flash Data Integrator (FDI)
Software
.D—Real-Time Data Storage and Code
Execution in the Same Memory Device
w— Full Flash File Manager Capability
■ Advanced+ Boot Block Flash Memory
—70 ns Access Time
—Instant, Individual Block Locking
—128 bit Protection Register
—12 V Production Programming
—Fast Program and Erase Suspend
—Extended Temperature –25 °C to +85 °C
■ Blocking Architecture
—Block Sizes for Code + Data Storage
—4-Kword Parameter Blocks
—64-Kbyte Main Blocks
—100,000 Erase Cycles per Block
■ Low Power Operation
—Asynchronous Read Current: 9 mA
(Flash)
—Standby Current: 7 µA (Flash)
—Automatic Power Saving Mode
■ Flash Technologies
—0.25 µm ETOX™ VI, 0.18 µm ETOX™
VII and 0.13 µm ETOX™ VIII Flash
Technologies
The Intel® Advanced+ Boot Block Flash Memory (C3) Stacked Chip Scale Package (SCSP)
wdevice delivers a feature-rich solution for low-power applications. The C3 SCSP memory device
incorporates flash memory and static RAM in one package with low voltage capability to
w omachieve the smallest system memory solution form-factor together with high-speed, low-power
.coperations. The C3 SCSP memory device offers a protection register and flexible block locking
to enable next generation security capability. Combined with the Intel® Flash Data Integrator
U(Intel® FDI) software, the C3 SCSP memory device provides a cost-effective, flexible, code plus
t4data storage solution.
.DataSheeOrder Number: 252636, Revision: 004
www 26 Aug 2005
1 page  
C3 SCSP Flash Memory
Revision History
Date of
Revision
02/11/03
01/29/04
03/05
26 Aug 2005
Version
-001
-002
-003
-004
Description
Initial release, Stacked Chip Scale Package
Minor text edits.
Updated Ordering Information figures and table in Appendix H.
Updated Ordering Information to add PF28F1602C3TD70.
Datasheet
Intel® Advanced+ Boot Block Flash Memory (C3) SCSP Family
Order Number: 252636, Revision: 004
26 Aug 2005
5
5 Page 
C3 SCSP Flash Memory
2.0 Principles of Operation
Figure 2.
The flash memory uses a CUI and automated algorithms to simplify program and erase operations.
To automate program and erase operations, the WSM handles data and address latches, WE#, and
system status requests.
Intel® Advanced+ Boot Block SCSP Block Diagram
F-VCC
F-OE#
F-CE#
F-WP#
F-RP#
Flash
28F160C3
or
28F320C3
F-VCCQ
F-WE#
F-VPP
F-VSS
A[Max:0]
S-VCC
S-CS1
S-CS2
S-OE#
SRAM
2-, 4- or 8-Mbit
D[15:0]
S-VSS
S-WE#
S-UB#
S-LB#
.
2.1 Bus Operation
All bus cycles to or from the SCSP conform to standard microcontroller bus cycles. Four control
signals dictate the data flow in and out of the flash component:
• F-CE#
• F-OE#
• F-WE#
• F-RP#
Four separate control signals handle the data flow in and out of the SRAM component:
• S-CS1#
• S-CS2
• S-OE#
• S-WE#
Table 2 on page 9 and Table 3 on page 12 summarize these bus operations .
Datasheet
Intel® Advanced+ Boot Block Flash Memory (C3) SCSP Family
Order Number: 252636, Revision: 004
26 Aug 2005
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet RD38Fxxxxxx.PDF ] | |
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