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PDF ICS9112-26 Data sheet ( Hoja de datos )
| Número de pieza | ICS9112-26 | |
| Descripción | Low Skew Output Buffer | |
| Fabricantes | Integrated Circuit Systems | |
| Logotipo |  |
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mIntegrated
.coCircuit
ICS9112-26Systems, Inc.
Low StkaeSwheOeut4tpUut BufferGeneral Description
.DaThe ICS9112-26 is a high performance, low skew, low jitter
clock driver. It is designed to distribute high speed clocks in
wPC systems operating at speeds from 0 to 133 MHz.
wwThe ICS9112-26 comes in an eight pin 150 mil SOIC package.
mIt has four output clocks.
Features
• Frequency range 0 - 133 MHz (3.3V)
• Less than 200 ps Jitter between outputs
• Skew controlled outputs
• Skew less than 250 ps between outputs
• Available in 8 pin 150 mil SOIC &
173 mil TSSOP packages.
• 3.3V ±10% operation
.coBlock Diagram
Pin Configuration
heet4UCLK_IN
CLK0
CLK1
CLK2
CLK0
VDD
GND
CLK1
1
2
3
4
8 CLK_IN
7 CLK3
6 VDD
5 CLK2
8 pin SOIC & TSSOP
taSCLK3
.DaPin Descriptions
wPIN NUMBER
w1
m2,6
w o3
.c4
t4U5
e7
e8
PIN NAME
CLK01
VDD
GND
CLK11
CLK21
CLK31
CLK_IN
TYPE
OUT
PWR
PWR
OUT
OUT
OUT
IN
ShNotes:
ta1. Weak pull-down on all outputs
Buffered clock output
Power Supply (3.3V)
Ground
Buffered clock output
Buffered clock output
Buffered clock output
Input reference frequency.
DESCRIPTION
www.Da9112-26 RevB-07/16/01
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.
1 page | ||
| Páginas | Total 4 Páginas | |
| PDF Descargar | [ Datasheet ICS9112-26.PDF ] | |
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