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PDF ICS9148-46 Data sheet ( Hoja de datos )
| Número de pieza | ICS9148-46 | |
| Descripción | Pentium/ProTM System Clock Chip | |
| Fabricantes | Integrated Circuit Systems | |
| Logotipo |  |
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Integrated
Circuit
Systems, Inc.
ICS9148-46
Pentium/ProTM System Clock Chip
General Description
The ICS9148-46 is part of a reduced pin count two-chip clock
solution for designs using an Intel BX style chipset.
Companion SDRAM buffers are ICS9179-03, and -12.
There are two PLLs, with the first PLL capable of spread
spectrum operation. Spread spectrum typically reduces system
EMI by 8-10dB. The second PLL provides support for USB
(48MHz) and 24MHz requirements. CPU frequencies up to
100MHz are supported.
The I2C interface allows stop clock programming, frequency
selection, and spread spectrum operation to be programmed.
Clock outputs include two CPU (2.5V or 3.3V), five PCI (3.3V),
two REF (3.3V), one 48MHz, and one selectable 48_24MHz.
Features
Generates system clocks for CPU, PCI, 14.314 MHz,
48 and 24MHz.
Supports single or dual processor systems
Skew from CPU (earlier) to PCI clock 1 to 4ns
Separate 2.5V and 3.3V supply pins
2.5V outputs: CPU
3.3V outputs: PCI, REF
No power supply sequence requirements
28 pin SSOP
Spread Sectrum operation optional for PLL1
CPU frequencies to 100MHz are supported.
Block Diagram
Pin Configuration
9148-46 Rev E 4/20/99
28 pin SSOP
Power Groups
VDD = Supply for PLL core
VDD1 = REF(0:1), X1, X2
VDD2 = PCICLK_F, PCICLK (0:3)
VDD3=48MHz,24/48MHz
VDDL = CPUCLK (0:1)
Ground Groups
GND = Ground Source Core, CPUCLK (0:1)
GND1 = REF(0:1), X1, X2
GND2 = PCICLK_F, PCICLK (0:5)
GND3=48MHz, 24/48MHz
Pentium is a trademark on Intel Corporation.
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.
1 page  
ICS9148-46
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND 0.5 V to VDD +0.5 V
Ambient Operating Temperature . . . . . . . . . . . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . 65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
TA = 0 - 70C; Supply Voltage VDD = VDDL = 3.3 V +/-5% (unless otherwise stated)
PARAMETER SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Input High Voltage
VIH
2 VDD+0.3 V
Input Low Voltage
Input High Current
Input Low Current
Input Low Current
Operating
Supply Current
Power Down
Supply Current
VIL
IIH
IIL1
IIL2
IDD3.3OP66
IDD3.3OP100
IDD3.3PD
VIN = VDD
VIN = 0 V; Inputs with no pull-up resistors
VIN = 0 V; Inputs with pull-up resistors
CL = 0 pF; Select @ 66MHz
CL = 0 pF; Select @ 100MHz
CL = 0 pF; With input address to Vdd or GND
VSS-0.3
-5
-200
0.1
2.0
-100
60
66
3
0.8
5
170
170
650
V
µA
µA
µA
mA
mA
µA
Input frequency
Fi VDD = 3.3 V;
Input Capacitance1
CIN Logic Inputs
CINX X1 & X2 pins
Transition Time1
Ttrans To 1st crossing of target Freq.
Settling Time1
Ts From 1st crossing to 1% target Freq.
Clk Stabilization1
TSTAB From VDD = 3.3 V to 1% target Freq.
Skew1
TAGP-PCI1 VT = 1.5 V;
1Guaranteed by design, not 100% tested in production.
14.318
27 36
5
1 3.5
5
45
3
3
4
MHz
pF
pF
ms
ms
ms
ns
Electrical Characteristics - Input/Supply/Common Output Parameters
TA = 0 - 70C; Supply Voltage VDD = 3.3 V +/-5%, VDDL = 2.5 V +/-5% (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
Operating
IDD2.5OP66 CL = 0 pF; Select @ 66.8 MHz
16 72
Supply Current
IDD2.5OP100 CL = 0 pF; Select @ 100 MHz
23 100
Power Down Supply
Current
IDD2.5PD
CL = 0 pF; With input address to
Vdd or GND
10 100
Skew1
tCP U -A GP
tCP U -P CI2
VT = 1.5 V; VTL = 1.25 V
0 0.5 1
1 2.6 4
1Guaranteed by design, not 100% tested in production.
UNITS
mA
mA
µA
ns
ns
5
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| PDF Descargar | [ Datasheet ICS9148-46.PDF ] | |
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