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PDF EMU8000 Data sheet ( Hoja de datos )
| Número de pieza | EMU8000 | |
| Descripción | Programmer Guide | |
| Fabricantes | ETC | |
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www.DataSheAetW4UE.3c2o/mEMU8000 Programmer’s Guide
.comRevision 1.00
UBy Dave Rossum
www.DataSheet4www.DataSheet4U.comCopyright © E-mu/Creative Technology Ltd. 1994-1996. All rights reserved.
1 page  
arising out of the purchase, use, inability to use, or operation of the software, and/or licensee
application, even if Creative Technology Ltd. or any authorised Creative Technology Ltd.
dealer has been advised of the possibility of such damages. Licensee accepts said disclaimer as
the basis upon which the software is offered at the current price and acknowledges that the
price of the software would be higher in lieu of said disclaimer. Some states do not allow the
limitation or exclusion of liability for incidental or consequential damages so the above
limitations and exclusions may not apply to you.
Information in this document is subject to change without notice. Creative Technology Ltd.
shall have no obligation to update or otherwise correct any errors in the manual and/or software
even if Creative Technology Ltd. is aware of such errors and Creative Technology Ltd. shall be
under no obligation to provide to Licensee any updates, corrections or bug-fixes which
Creative Technology Ltd. may elect to prepare.
Creative Technology Ltd. does not warrant that the functions contained in the manual will be
uninterrupted or error free and Licensee is encouraged to test the software for Licensee's
intended use prior to placing any reliance thereon.
5 Page 
Bit 24 is the RIGHT bit for the channel which should be only set when bit 26 is set, and
determines if the DMA channel uses the “left” or “right” DMA stream. 1=right, 0=left.
Bits 23-0 are the current sound memory address for the channel. Note that the actual audio
location is the point 1 word higher than this value due to interpolator offset.
Register : HWCF4
Description : Configuration DoubleWord 4
Zero should be written to this doubleword register during the initialization process. After this, it
can be ignored.
Register : HWCF5
Description : Configuration DoubleWord 5
Value 0x00000083 should be written to this doubleword register during the initialization process.
After this, it can be ignored.
Register : HWCF6
Description : Configuration DoubleWord 6
Value 0x00008000 should be written to this doubleword during the initialization process. After
this, it can be ignored.
Register : SMALR
Description : Sound Memory Address for “Left” SM Reads
31 30
MT 0
24 23
SMALR
0
Bit 31 of this doubleword register is an “empty” bit, which indicates whether register SMLD is
empty or full of data for reading. When cleared indicates the DMA data has been read from the
sound memory into the SMLD register and can be read. Read only.
Bits 31-24 are Don’t Care on write, and bits 30-24 are zero on read.
Bits 23-0 are the sound memory address which will be used for “left” DMA stream data fetch
the next time the SMLD read register becomes empty and a DMA channel is available to fill it.
EMU8000 Programmer's Guide
Copyright © E-mu/Creative Technolgy Ltd. 1994-1996. All Rights Reserved.
Page 11
11 Page | ||
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