PDF ICS952621 Data sheet ( Hoja de datos )

Número de pieza	ICS952621
Descripción	Programmable Timing Control Hub for Next Gen P4 processor
Fabricantes	Integrated Circuit Systems
Logotipo
Hay una vista previa y un enlace de descarga de ICS952621 (archivo pdf) en la parte inferior de esta página. Total 15 Páginas
No Preview Available ! Integrated Circuit Systems, Inc. ICS952621 Programmable Timing Control Hub™ for Next Gen P4™ processor Recommended Application: CK409 48-pin part Output Features: • 2 - 0.7V current-mode differential CPU pairs • 1 - 0.7V current-mode differential CPU pairs for ITP • 1 - 0.7V current-mode differential SRC pair • 9 - PCI (33MHz), including 3 free running PCI • 1 - USB, 48MHz • 1 - DOT, 48MHz • 2 - REF, 14.318MHz • 3 - 3V66, 66.66MHz • 1 - 3V66/VCH, selectable 48MHz or 66MHz Key Specifications: • CPU/SRC outputs cycle-cycle jitter < 125ps • 3V66 outputs cycle-cycle jitter < 250ps • PCI outputs cycle-cycle jitter < 250ps • CPU outputs skew: < 100ps • +/- 300ppm frequency accuracy on CPU & SRC clocks Functionality FS2 CPU SRC B6b5 FS_A FS_B MHz MHz 0 0 100.00 100/200 0 0 1 200.00 100/200 1 0 133.33 100/200 1 1 166.66 100/200 0 0 200.00 100/200 1 0 1 400.00 100/200 1 0 266.66 100/200 1 1 333.33 100/200 3V66 MHz 66.66 66.66 66.66 66.66 66.66 66.66 66.66 66.66 PCI MHz 33.33 33.33 33.33 33.33 33.33 33.33 33.33 33.33 REF MHz 14.318 14.318 14.318 14.318 14.318 14.318 14.318 14.318 USB/ DOT MHz 48.00 48.00 48.00 48.00 48.00 48.00 48.00 48.00 Features/Benefits: • Supports tight ppm accuracy clocks for Serial-ATA • Supports spread spectrum modulation, 0 to -0.5% down spread and +/- 0.25% center spread • Supports CPU clks up to 400MHz in test mode • Uses external 14.318MHz crystal • Supports undriven differential CPU, SRC pair in PD# and CPU_STOP# for power management. Pin Configuration FS_A/REF1 1 FS_B/REF0 2 VDDREF 3 X1 4 X2 5 GND 6 PCICLK_F0 7 PCICLK_F1 8 PCICLK_F2 9 VDDPCI 10 GND 11 PCICLK0 12 PCICLK1 13 PCICLK2 14 PCICLK3 15 VDDPCI 16 GND 17 PCICLK4 18 PCICLK5 19 PD# 20 48MHz_DOT 21 48MHz_USB 22 GND 23 VDD48 24 48 VDDA 47 GND 46 IREF 45 CPUCLKT_ITP 44 CPUCLKC_ITP 43 GND 42 CPUCLKT1 41 CPUCLKC1 40 VDDCPU 39 CPUCLKT0 38 CPUCLKC0 37 GND 36 SRCCLKT 35 SRCCLKC 34 VDD 33 VttPWR_GD# 32 SDATA 31 SCLK 30 3V66_0 29 3V66_1 28 GND 27 VDD3V66 26 3V66_2 25 3V66_3/VCH **120KΩ pull-down 48-pin SSOP 0756A—09/10/04 1 page Integrated Circuit Systems, Inc. ICS952621 Electrical Characteristics - CPU & SRC 0.7V Current Mode Differential Pair TA = 0 - 70°C; VDD = 3.3V +/-5%; CL =2pF PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES Current Source Output Impedance Zo1 VO = Vx 3000 Ω Voltage High Voltage Low VHigh VLow Statistical measurement on single 660 ended signal using oscilloscope math function. -150 749 3 850 150 mV Max Voltage Min Voltage Crossing Voltage (abs) Crossing Voltage (var) Long Accuracy Vovs Vuds Vcross(abs) d-Vcross ppm Measurement on single ended signal using absolute value. Variation of crossing over all edges see Tperiod min-max values 200MHz nominal -300 250 756 -7 350 12 -300 0 4.9985 5.0000 1150 550 140 300 5.0015 mV mV mV ppm ns 200MHz spread 166.66MHz nominal 4.9985 5.0266 5.9982 6.0000 6.0018 ns ns Average period Tperiod 166.66MHz spread 133.33MHz nominal 133.33MHz spread 100.00MHz nominal 100.00MHz spread 5.9982 6.0320 7.4978 7.5000 7.5023 7.4978 5.4000 9.9970 10.0000 10.0030 9.9970 10.0533 ns ns ns ns ns Absolute min period Tabsmin 200MHz nominal 166.66MHz nominal/spread 133.33MHz nominal/spread 100.00MHz nominal/spread 4.8735 5.8732 7.3728 9.8720 ns ns ns ns Rise Time tr VOL = 0.175V, VOH = 0.525V 175 279 700 ps Fall Time tf VOH = 0.525V VOL = 0.175V 175 280 700 ps Rise Time Variation d-tr 30 125 ps Fall Time Variation d-tf 30 125 ps Duty Cycle dt3 Measurement from differential wavefrom 45 50.9 55 % Skew tsk3 VT = 50% 8 100 ps Jitter, Cycle to cycle tjcyc-cyc Measurement from differential wavefrom 40 125 ps 1Guaranteed by design, not 100% tested in production. 2 All Long Term Accuracy and Clock Period specifications are guaranteed with the assumption that Ref output is at 14.31818MHz SRC clock outputs run at only 100MHz or 200MHz, specs for 133.33 and 166.66 do not apply to SRC clock pair. 1 1 1 1 1 1 1 1,2 2 2 2 2 2 2 2 2 1,2 1,2 1,2 1,2 1 1 1 1 1 1 1 0756A—09/10/04 5 5 Page Integrated Circuit Systems, Inc. I2C Table: Byte Count Register Byte 8 Pin # Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 - - - - - - - - Name BC7 BC6 BC5 BC4 BC3 BC2 BC1 BC0 ICS952621 Control Function Writing to this register will configure how many bytes will be read back, default is 08 = 8 bytes. Type RW RW RW RW RW RW RW RW 0 - - - - - - - - 1 PWD -0 -0 -0 -0 -1 -0 -0 -0 0756A—09/10/04 11 11 Page

Páginas	Total 15 Páginas
PDF Descargar	[ Datasheet ICS952621.PDF ]

Hoja de datos destacado

Número de pieza	Descripción	Fabricantes
ICS952621	Programmable Timing Control Hub for Next Gen P4 processor	Integrated Circuit Systems
ICS952621	Programmable Timing Control Hub	ICS
ICS952623	Programmable Timing Control Hub	ICS

Número de pieza	Descripción	Fabricantes
SLA6805M	High Voltage 3 phase Motor Driver IC.	Sanken
SDC1742	12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.	Analog Devices

DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.

DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar