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ST MICROELECTRONICS - STW18NB40

Numéro de référence W18NB40
Description STW18NB40
Fabricant ST MICROELECTRONICS 
Logo ST MICROELECTRONICS 





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W18NB40 fiche technique
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STW18NB40
STH18NB40FI
N-CHANNEL 400V - 0.19 - 18.4 A TO-247/ISOWATT218
PowerMesh™ MOSFET
TYPE
VDSS
RDS(on)
ID
PRELIMINARY DATA
STW18NB40
STH18NB40FI
400 V
400 V
< 0.26
< 0.26
18.4 A
12.4 A
s TYPICAL RDS(on) = 0.19
s EXTREMELY HIGH dv/dt CAPABILITY
s 100% AVALANCHE TESTED
s VERY LOW INTRINSIC CAPACITANCES
s GATE CHARGE MINIMIZED
DESCRIPTION
Using the latest high voltage MESH OVERLAY
process, STMicroelectronics has designed an ad-
vanced family of power MOSFETs with outstanding
performances. The new patent pending strip layout
coupled with the Company’s proprieraty edge termi-
nation structure, gives the lowest RDS(on) per area,
exceptional avalanche and dv/dt capabilities and
unrivalled gate charge and switching characteris-
tics.
3
2
1
TO-247
3
2
1
ISOWATT218
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s SWITH MODE POWER SUPPLIES (SMPS)
s DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS Drain-source Voltage (VGS = 0)
VDGR
Drain-gate Voltage (RGS = 20 k)
VGS Gate- source Voltage
ID Drain Current (continuos) at TC = 25°C
ID
IDM (l)
Drain Current (continuos) at TC = 100°C
Drain Current (pulsed)
PTOT
Total Dissipation at TC = 25°C
Derating Factor
dv/dt (1) Peak Diode Recovery voltage slope
VISO
Insulation Withstand Voltage (DC)
Tstg Storage Temperature
Tj Max. Operating Junction Temperature
(•)Pulse width limited by safe operating area
June 2002
Value
STW18NB40 STH18NB40FI
400
400
±30
18.4 12.4
11.6 7.8
73.6 73.6
190 80
1.52 0.64
4.5 4.5
- 2000
–65 to 150
150
Unit
V
V
V
A
A
A
W
W/°C
V/ns
V
°C
°C
(1)ISD<18.4A, di/dt<200A/µ, VDD<V(BR)DSS,TJ<TJMAX
1/7

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