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Intel - (N87C251SA/SB/SP/SQ) High Performance CHMOS Microcontroller

Numéro de référence N87C251SQ
Description (N87C251SA/SB/SP/SQ) High Performance CHMOS Microcontroller
Fabricant Intel 
Logo Intel 





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N87C251SQ fiche technique
CHMH8OUIXGS.CHcM2o-5PImC1ESRRAOF/OCSOBR/MNSTAPRN/SOCQLELERCommercial/Express
eet4J Real Time and Programmed Wait State
hBus Operation
SJ Binary-code Compatible with MCS® 51
ta mJ Pin Compatible with 44-lead PLCC and
.Da o40-lead PDIP MCS 51 Sockets
J Register-based MCS® 251 Architecture
w .c— 40-byte Register File
— Registers Accessible as Bytes, Words,
w and Double Words
w UJ Enriched MCS 51 Instruction Set
— 16-bit and 32-bit Arithmetic and Logic
t4Instructions
— Compare and Conditional Jump
Instructions
e— Expanded Set of Move Instructions
eJ Linear Addressing
J 256-Kbyte Expanded External Code/Data
hMemory Space
J ROM/OTPROM/EPROM Options:
S16 Kbytes (SB/SQ), 8 Kbytes (SA/SP), or
without ROM/OTPROM/EPROM
taJ 16-bit Internal Code Fetch
J 64-Kbyte Extended Stack Space
aJ On-chip Data RAM Options:
m1-Kbyte (SA/SB) or 512-Byte (SP/SQ)
.D oJ 8-bit, “Min” 2-clock External Code Fetch
.cin
UPage Mode
J User-selectable Configurations:
— External Wait States (0-3 wait states)
— Address Range & Memory Mapping
— Page Mode
J 32 Programmable I/O Lines
J Seven Maskable Interrupt Sources
with Four Programmable Priority
Levels
J Three Flexible 16-bit Timer/counters
J Hardware Watchdog Timer
J Programmable Counter Array
— High-speed Output
— Compare/Capture Operation
— Pulse Width Modulator
— Watchdog Timer
J Programmable Serial I/O Port
— Framing Error Detection
— Automatic Address Recognition
J High-performance CHMOS Technology
J Static Standby to 16-MHz Operation
J Complete System Development
Support
— Compatible with Existing Tools
— New MCS 251 Tools Available:
Compiler, Assembler, Debugger, ICE
J Package Options (PDIP, PLCC, and
Ceramic DIP)
J Fast MCS 251 Instruction Pipeline
w et4This document contains information on products with “[M] [C] '94 '95 C” as the last line of the top marking
diagram. A member of the Intel family of 8-bit MCS 251 microcontrollers, the 8XC251SA/SB/SP/SQ is binary-
w ecode compatible with MCS 51 microcontrollers and pin compatible with 40-lead PDIP and 44-lead PLCC
hMCS 51 microcontrollers. MCS 251 microcontrollers feature an enriched instruction set, linear addressing,
w Sand efficient C-language support. The 8XC251SA/SB/SP/SQ has 512 bytes or 1 Kbyte of on-chip RAM and is
taavailable with 8 Kbytes or 16 Kbytes of on-chip ROM/OTPROM/EPROM, or without
ROM/OTPROM/EPROM. A variety of features can be selected by new user-programmable configurations.
w.DaInformation in this document is provided in connection with Intel products. Intel assumes no liability whatsoever, including infringement of
wany patent or copyright, for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products.
wIntel retains the right to make changes to these specifications at any time, without notice. Microcontroller products may have minor varia-
tions to this specification known as errata.
COPYRIGHT © INTEL CORPORATION, 2004
July 2004
Order Number: 272783-004

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