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PDF KM68V1000B Data sheet ( Hoja de datos )
| Número de pieza | KM68V1000B | |
| Descripción | (KM68V1000B / KM68U1000B) 128K X 8bit Low Power and Low Voltage CMOS Statinc RAM | |
| Fabricantes | Samsung semiconductor | |
| Logotipo |  |
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KM68V1000B, KM68U1000B Family
Document Title
128K x8 bit Low Power and Low Voltage CMOS Static RAM
Revision History
Revision No. History
0.0 Initial draft
1.0 Finalize
2.0 Revise
- Change datasheet format
CMOS SRAM
Draft Data Remark
August 12, 1995 Preliminary
April 12, 1996 Final
March 7, 1998 Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
Revision 2.0
March 1998
1 page  
KM68V1000B, KM68U1000B Family
CMOS SRAM
AC OPERATING CONDITIONS
TEST CONDITIONS( Test Load and Input/Output Reference)
Input pulse level : 0.4 to 2.2V
Input rising and falling time : 5ns
Input and output reference voltage :1.5V
Output load(see right) : CL=100pF+1TTL
CL=30pF+1TTL
CL1)
1. Including scope and jig capacitance
AC CHARACTERISTICS (Commercial product :TA=0 to 70°C, Extended product :TA=-25 to 85°C, Industrial product : TA=-40 to 85°C
KM68V1000B Family:Vcc=3.0~3.6V, KM68U1000B Family:Vcc=2.7~3.3V)
Parameter List
Read
Write
Read cycle time
Address access time
Chip select to output
Output enable to valid output
Chip select to low-Z output
Output enable to low-Z output
Chip disable to high-Z output
Output disable to high-Z output
Output hold from address change
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
Symbol
tRC
tAA
tCO
tOE
tLZ
tOLZ
tHZ
tOHZ
tOH
tWC
tCW
tAS
tAW
tWP
tWR
tWHZ
tDW
tDH
tOW
Speed Bins
70ns
100ns
Min Max Min Max
70 - 100 -
- 70
- 100
- 70
- 100
- 35 - 50
10 - 10 -
5- 5 -
0 25 0 30
0 25 0 30
10 - 15 -
70 - 100 -
60 - 80 -
0- 0 -
60 - 80 -
55 - 70 -
0- 0 -
0 25 0 30
30 - 40 -
0- 0 -
5- 5 -
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DATA RETENTION CHARACTERISTICS
Item
Vcc for data retention
Symbol
VDR
KM68V1000BL/L-L
Test Condition
Min Typ Max Unit
CS11)≥Vcc-0.2V
2.0 - 3.6 V
Low Power
Low Low Power
-
-
1 30
0.5 15
Data retention current
KM68V1000BLE/LE-L Vcc=3.0V
Low Power
KM68V1000BLI/LI-L
IDR
KM68U1000BL/L-L
CS1≥Vcc-0.2V
CS2≥Vcc-0.2V
or CS2≤0.2V
Low Low Power
Low Power
Low Low Power
-
-
-
-
- 50
- 20
µA
- 25
- 10
KM68U1000BLE/LE-L
KM68U1000BLI/LI-L
Low Power
Low Low Power
-
-
- 25
- 15
Data retention set-up time
Recovery time
tSDR
tRDR
See data retention waveform
1. CS≥VCC-0.2V, CS2≥VCC-0.2V(CS1 controlled) or CS2≤0.2V(CS2 controlled)
0- -
ms
5- -
Revision 2.0
March 1998
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet KM68V1000B.PDF ] | |
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