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PDF S2090 Data sheet ( Hoja de datos )
| Número de pieza | S2090 | |
| Descripción | Differential Crosspoint Switch | |
| Fabricantes | AMCC | |
| Logotipo |  |
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®
mDEVICE
.coS6P8ECXIF6I9CA3T.2IOGNBPS DIFFERENTIAL CROSSPOINT SWITCH
68 X 69 3.2 GBPS DIFFERENTIAL CROSSPOINT SWITCH
S2090
S2090
et4UFEATURES
he• SiGe BiCMOS Technology
S• 68 x 69 differential crosspoint switch
ta• Broadcast and multicast switching capability
a• Differential 200 mV to 1600 mV input data
.D• Differential 400 mV to 1400 mV
wprogrammable output swing
w• Up to 3.2 Gbps NRZ data rate
w • Power down of individual output drivers
m• Parallel read back function
o• LVTTL configuration controls
.c• Internal 100 Ω line to line terminations on
high-speed differential inputs
• Reconfigurable without disturbing operation
U• Single +3.3 V supply or +2.5 V supply
t4• 9.5 W typical power dissipation with
800 mV output swing
e• Compact 32.5 mm x 32.5 mm 624 pin
CBGA package
e• Complies with Bellcore and ITU-T standards
hAPPLICATIONS
S• Dense Wavelength Division Multiplexing
(DWDM) systems
ta• Internet switches
• Digital video
• Digital demultiplexing
• Microwave or fiber-optic data distribution
• High-speed automatic test equipment
• Datacom or telecom switching
GENERAL DESCRIPTION
The S2090 is a high-speed 68 x 69 differential
crosspoint switch with both full broadcast and
multicast capability. Any of its 68 differential
LVPECL input signal pairs can be connected to any
or all of its 69 differential CML output signal pairs.
The differential logic data path makes the part ideal for
high-speed applications. The differential nature of the
data path is retained throughout the crosspoint struc-
ture to minimize data distortion and to handle NRZ
data rates up to 3.2 Gbps. The high-speed serial in-
puts to the S2090 are internally biased and have inter-
nal 100 Ω line-to-line terminations.
LVTTL configuration controls simplify interfacing to
slower speed circuitry. Once a new configuration has
been entered into the configuration register file, the
S2090 can be completely reconfigured by pulsing
the CONFIGN input.
Figure 1 shows a system block diagram incorporat-
ing the S2090 with other AMCC devices. Figure 2
shows the basic operation of the switch.
aFigure 1. System Block Diagram
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S2092
S2092
S2092
S2092
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00
S2090
Crosspoint
Switch
67 68
S2092
S2092
S2092
S2092
S3056
Port Card
S3057
S3057
S3056
S3052
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S3057
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Port Card
May 31, 2001 / Revision NC
1
1 page  
68 X 69 3.2 GBPS DIFFERENTIAL CROSSPOINT SWITCH
S2090
Table 2. Swing Adjust Pin Settings for Outputs
[0:31, 67, 68] (+3.3 V)
Output
Setting #
VADJUST1
VADJUST2
VADJUST3
DOUTxx
(mVpp
Diff.)
1 O T O 380
2 T T O 550
3 O O T 715
4 T O T 870
5 O T T 1030
6 T T T 1180
Note: T = Tie VADJUSTx (x = 1,2,3) pin(s) to VCSHIGH1.
O = Open
Table 2A. Swing Adjust Pin Settings for Outputs
[32:66] (+3.3 V)
Output
Setting #
VADJUST4
VADJUST5
VADJUST6
DOUTxx
(mVpp
Diff.)
1 O T O 380
2 T T O 550
3 O O T 715
4 T O T 870
5 O T T 1030
6 T T T 1180
Note: T = Tie VADJUSTx (x = 4,5,6) pin(s) to VCSHIGH2.
O = Open
Table 3. Swing Adjust Pin Settings for Outputs
[0:31, 67, 68] (+2.5 V)
Output
Setting #
VADJUST1
VADJUST2
VADJUST3
DOUTxx
(mVpp
Diff.)
1 O T O 300
2 T T O 440
3 O O T 570
4 T O T 685
5 O T T 775
6 T T T 900
Note: T = Tie VADJUSTx (x = 1,2,3) pin(s) to VCSHIGH1.
O = Open
Table 3A. Swing Adjust Pin Settings for Outputs
[32:66] (+2.5 V)
Output
Setting #
VADJUST4
VADJUST5
VADJUST6
DOUTxx
(mVpp
Diff.)
1 O T O 300
2 T T O 440
3 O O T 570
4 T O T 685
5 O T T 775
6 T T T 900
Note: T = Tie VADJUSTx (x = 4,5,6) pin(s) to VCSHIGH2.
O = Open
May 31, 2001 / Revision NC
5
5 Page 
68 X 69 3.2 GBPS DIFFERENTIAL CROSSPOINT SWITCH
S2090
Table 4. Data Transfer Timing1,2,3 (+3.3 V supply)
Parameter
Description
Min Typ Max Units Conditions
tDIDO Propagation delay from DIN[67:0]P/N
to DOUT[68:0]P/N
2.5 ns
tCFDO
Propagation delay from falling edge of
CONFIGN to DOUT[68:0]P/N valid
11 ns
tLDDO
Propagation delay from falling edge of
LOADN to DOUT[68:0]P/N valid
(when CONFIGN is held Low)
11 ns
TCSDO
Propagation delay from falling edge of
CSN to DOUT[68:0]P/N valid (when
CONFIGN is held Low)
13.5 ns
FMAX
TJITTER RMS
Data Rate
Random jitter accumulation, any input
to any output at:
3.2 Gbps
2.5 Gbps
1.5 Gbps
1.0 Gbps
3.2 Gbps
RMS output jitter
accumulated with
1.9 3.2 ps K28.7 code.
1.9 3.2 ps Tested on a
2.0 3.2 ps sample basis.
2.0 3.2 ps
TJITTER DJ
Deterministic jitter accumulation, any
input to any output at:
3.2 Gbps
2.5 Gbps
1.5 Gbps
1.0 Gbps
Deterministic
output jitter
18 28 ps accumulated with
18 28 ps K28.5 pattern.
18 28 ps Tested on a
18 30 ps sample basis.
Peak-to-peak.
TJITTER CTK
Deterministic jitter accumulation due
to crosstalk, any input to any output
at:
3.2 Gbps
2.5 Gbps
1.5 Gbps
1.0 Gbps
Deterministic
output jitter
accumulated with
2 4 ps K28.5 pattern.
2 4 ps Tested on a
2 4 ps sample basis.
4 6 ps Peak-to-peak.
SkewXPT
Skew from output to output.
Any inputs to any outputs.
140 ps
T Tr(out), f(out)
Output Edge Rate (20% to 80%)
120 ps 100 Ω line-to-line.
1. All data transfer timing measured from the crossing point of the differential inputs to the crossing point of the differential outputs.
2. All LVTTL signals measured at the 1.5 V point.
3. All data measured with output setting #3.
May 31, 2001 / Revision NC
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet S2090.PDF ] | |
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