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PDF IDT74LVC157A Data sheet ( Hoja de datos )
| Número de pieza | IDT74LVC157A | |
| Descripción | 3.3V CMOS QUAD 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER / 5 VOLT TOLERANT I/O | |
| Fabricantes | Integrated Device Technology | |
| Logotipo |  |
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IDT74LVC157A
3.3V CMOS QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR
EXTENDEDCOMMERCIALTEMPERATURERANGE
3.3V CMOS QUADRUPLE
2-LINE TO 1-LINE DATA
SELECTOR/MULTIPLEXER,
5 VOLT TOLERANT I/O
IDT74LVC157A
FEATURES:
– 0.5 MICRON CMOS Technology
– ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– 1.27mm pitch SOIC, 0.635mm pitch QSOP,
0.65mm pitch SSOP, 0.65mm pitch TSSOP packages
– Extended commercial range of – 40°C to +85°C
– VCC = 3.3V ±0.3V, Normal Range
– VCC = 2.3V to 3.6V, Extended Range
– CMOS power levels (0.4µ W typ. static)
– Rail-to-Rail output swing for increased noise margin
– All inputs, outputs and I/O are 5 Volt tolerant
– Supports hot insertion
Drive Features for LVC157A:
– High Output Drivers: ±24mA
– Reduced system switching noise
DESCRIPTION:
This quadruple 2-line to 1-line data selector/multiplexer is built using
advanced dual metal CMOS technology. The LVC157A features a common
strobe (G) input. When the strobe is high, all outputs are low. When the
strobe is low, a 4-bit word is selected from one of two sources and is routed
to the four outputs. The device provides true data.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V supply system.
The LVC157A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
FUNCTIONAL BLOCK DIAGRAM
2
1A
3
1B
5
2A
6
2B
11
3A
10
3B
14
4A
4B 13
G
A/B
15
1
4
1Y
7
2Y
9
3Y
12
4Y
EXTENDED COMMERCIAL TEMPERATURE RANGE
c 1999 Integrated Device Technology, Inc.
1
FEBRUARY 2000
DSC-4721/-
1 page  
IDT74LVC157A
3.3V CMOS QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR
EXTENDEDCOMMERCIALTEMPERATURERANGE
TEST CIRCUITS AND WAVEFORMS
TEST CONDITIONS
PROPAGATION DELAY
Symbol
VLOAD
VCC(1)= 2.5V ±0.2V
2 x Vcc
VCC(2)= 3.3V ±0.3V & 2.7V
6
Unit
V
VIH Vcc
2.7 V
VT VCC / 2
1.5 V
VLZ 150
300 mV
VHZ 150
300 mV
CL 30
50 pF
LVC QUAD Link
TEST CIRCUITS FOR ALL OUTPUTS
VCC
P u lse(1, 2)
G ene rator
V IN
VOUT
D .U .T .
500Ω
VLOAD
Open
GND
RT
500Ω
CL
LVC QUAD Link
DEFINITIONS:
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
NOTES:
1. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2ns; tR ≤ 2ns.
2. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
SAME PHASE
INPUT TRANSITION
OUTPUT
tPLH
OPPOSITE PHASE
INPUT TRANSITION
tPLH
tPHL
tPHL
VIH
VT
0V
VOH
VT
VOL
VIH
VT
0V
LV C Q UA D Link
ENABLE AND DISABLE TIMES
CONTROL
IN P U T
ENABLE
tPZL
DISABLE
tPLZ
V IH
VT
0V
OUTPUT SWITCH
NORMALLY CLOSED
LOW
tPZH
OUTPUT
NORMALLY
SW ITCH
OPEN
HIGH
V L O A D /2
VT
tPHZ
VT
0V
V L O A D /2
VLZ
VOL
VOH
VHZ
0V
LVC QUAD Link
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
SWITCH POSITION
SET-UP, HOLD, AND RELEASE TIMES
Test
Open Drain
Disable Low
Enable Low
Disable High
Enable High
All Other tests
Switch
VLOAD
GND
Open
DATA
IN P U T
TIMING
IN P U T
SYNCHRONOUS
CONTROL
OUTPUT SKEW - tsk (x)
LVC QUAD Link
V IH
ASYNCHRONOUS
CONTROL
IN P U T
OUTPUT 1
tPLH1
tPHL1
tSK (x)
tSK (x)
VT
0V
VOH
VT
VOL
VOH
PULSE WIDTH
LO W -H IG H -LO W
PULSE
OUTPUT 2
tPLH2
tPHL2
VT
VOL
HIGH-LOW -HIGH
PULSE
tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1
NOTES:
LVC QUAD Link
1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
5
tSU tH
tREM
tSU tH
V IH
VT
0V
V IH
VT
0V
V IH
VT
0V
V IH
VT
0V
LVC QUAD Link
VT
tW
VT
LV C Q UA D Link
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet IDT74LVC157A.PDF ] | |
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