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PDF HD404448 Data sheet ( Hoja de datos )

Número de pieza HD404448
Descripción (HD4074448 / HD4074449) MICROCONTROLLER
Fabricantes Hitachi 
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No Preview Available ! HD404448 Hoja de datos, Descripción, Manual

HD404449 Series
Rev. 6.0
Sept. 1998
mDescription
.coThe HD404449 Series is a HMCS400-series microcomputer designed to increase program productivity
with large-capacity memory. Each microcomputer has four timers, two serial interfaces, A/D converter,
input capture circuit, 32-kHz oscillator for clock, and four low-power dissipation modes.
UThe HD404449 Series includes three chips: the HD404448 with 8-kword ROM; the HD404449 with 16-
t4kword ROM; and HD4074449 with 16-kword PROM (ZTATversion).
eThe HD4074449 is a PROM version (ZTATmicrocomputer). A program can be written to the PROM by
a PROM writer, which can dramatically shorten system development periods and smooth the process from
edebugging to mass production. (The ZTATversion is 27256-compatible.)
hZTAT: Zero Turn Around Time ZTAT is a trademark of Hitachi Ltd.
SFeatures
ta8,192-word × 10-bit ROM (HD404448)
a16,384-word × 10-bit ROM (HD404449 and HD4074449)
1,152-digit × 4-bit RAM
.D64 I/O pins, including 10 high-current pins (15 mA, max)
Four timer/counters
wEight-bit input capture circuit
Three timer outputs (including two PWM outputs)
wTwo event counter inputs (including one double-edge function)
wTwo clock-synchronous 8-bit serial interfaces
A/D converter (4-channel × 8-bit)
Built-in oscillators
Main clock: 4-MHz ceramic oscillator or crystal (an external clock is also possible)
Subclock: 32.768-kHz crystal
Eleven interrupt sources
Four by external sources, including two double-edge function
Seven by internal sources
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1 page




HD404448 pdf
Block Diagram
HD404449 Series
INT 0
INT 1
INT 2
INT 3
EVNB
TOB
TOC
EVND
TOD
SI 1
SO1
SCK1
SI2
SO2
SCK2
AVCC
AVSS
AN0
AN1
AN2
AN3
External
interrupt
Timer
A
Timer
B
Timer
C
Timer
D
Serial
interface
1
Serial
interface
2
A/D
converter
System control
RAM
(1,152 × 4 bits)
W
(2 bits)
X
(4 bits)
SPX
(4 bits)
Y
(4 bits)
SPY
(4 bits)
CPU
ALU
ST CA
(1 bit) (1 bit)
A
(4 bits)
B
(4 bits)
SP
(10 bits)
Instruction
decoder
PC
(14 bits)
ROM
(16,384 × 10 bits)
(8,192 × 10 bits)
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
R0
R0
R0
R0
0
1
2
3
R1
R1
R1
R1
0
1
2
3
R2
R2
R2
R2
0
1
2
3
R3
R3
R3
R3
0
1
2
3
R4
R4
R4
R4
0
1
2
3
R5
R5
R5
R5
0
1
2
3
R6
R6
R6
R6
0
1
2
3
R7
R7
R7
R7
0
1
2
3
R8
R8
R8
R8
0
1
2
3
R9
R9
R9
R9
0
1
2
3
RRRRAAAA0123
RB0
RB1
RB2
RB3
RC0
RC1
RC2
RC3
High current
pins
: Data bus
: Signal line
5

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HD404448 arduino
HD404449 Series
$000
$003
PMRA $004
SM1A $005
SR1L $006
SR1U $007
TMA $008
TMB1 $009
TRBL/TWBL $00A
TRBU/TWBU $00B
MIS $00C
TMC1 $00D
TRCL/TWCL $00E
TRCU/TWCU $00F
TMD1 $010
TRDL/TWDL $011
TRDU/TWDU $012
TMB2 $013
TMC2 $014
TMD2 $015
AMR $016
ADRL $017
ADRU $018
SM2A $01B
SM2B $01C
SR2L $01D
SR2U $01E
$020
$023
PMRB $024
PMRC $025
ESR1 $026
ESR2 $027
SM1B $028
SSR $029
DCD0 $02C
DCD1 $02D
DCD2 $02E
DCR0 $030
DCR1 $031
DCR2 $032
DCR3 $033
DCR4 $034
DCR5 $035
DCR6 $036
DCR7 $037
DCR8 $038
DCR9 $039
DCRA $03A
DCRB $03B
DCRC $03C
V $03F
Bit 3
Bit 2
Bit 1
Bit 0
Interrupt control bits area
R52/SI2
R41/SCK1
R53/SO2
R42/SI1
R43/SO1
Serial transmit clock speed selection 1
Serial data register 1 (lower digit)
Serial data register 1 (upper digit)
*1 Clock source selection (timer A)
*2 Clock source selection (timer B)
Timer B register (lower digit)
Timer B register (upper digit)
*3
R43/SO1 PMOS control
Interrupt frame period selection
*2 Clock source selection (timer C)
Timer C register (lower digit)
Timer C register (upper digit)
*2 Clock source selection (timer D)
Timer D register (lower digit)
Timer D register (upper digit)
Not used
Not used
Timer-B output mode selection
Not used
Timer-C output mode selection
*4 Timer-D output mode selection
Analog channel selection
Not used
*5
A/D data register (lower digit)
A/D data register (upper digit)
R51/SCK2
Not used
Not used
Serial transmit clock speed selection 2
R53/SO2 PMOS control
*6
Serial data register 2 (lower digit)
*7
Serial data register 2 (upper digit)
Not used
Register flag area
Not used
R02/INT3
D13/INT0
D12/STOPC
INT3 detection edge selection
EVND detection edge selection
R01/INT2
R00/INT1
R40/EVND
R33/EVNB
INT2 detection edge selection
Not used
Not used
Not used
*8
*9
*10 *11 *12 Not used
Not used
Port D3 DCR
Port D7 DCR
Port D11 DCR
Port D2 DCR
Port D1 DCR
Port D6 DCR
Port D5 DCR
Port D10 DCR
Port D9 DCR
Not used
Port D0 DCR
Port D4 DCR
Port D8 DCR
Port R03 DCR
Port R13 DCR
Port R23 DCR
Port R33 DCR
Port R43 DCR
Port R53 DCR
Port R63 DCR
Port R73 DCR
Port R83 DCR
Port R93 DCR
Port RA3 DCR
Port RB3 DCR
Port RC3 DCR
Port R02 DCR
Port R01 DCR
Port R12 DCR
Port R11 DCR
Port R22 DCR
Port R21 DCR
Port R32 DCR
Port R31 DCR
Port R42 DCR
Port R41 DCR
Port R52 DCR
Port R51 DCR
Port R62 DCR
Port R61 DCR
Port R72 DCR
Port R71 DCR
Port R82 DCR
Port R81 DCR
Port R92 DCR
Port R91 DCR
Port RA2 DCR Port RA1 DCR
Port RB2 DCR Port RB1 DCR
Port RC2 DCR Port RC1 DCR
Not used
Port R00 DCR
Port R10 DCR
Port R20 DCR
Port R30 DCR
Port R40 DCR
Port R50 DCR
Port R60 DCR
Port R70 DCR
Port R80 DCR
Port R90 DCR
Port RA0 DCR
Port RB0 DCR
Port RC0 DCR
Not used
Not used
Not used
*13
Notes:
1. Timer-A/time-base
2. Auto-reload on/off
3. Pull-up MOS control
4. Input capture selection
5. A/D conversion time
6. SO2 ouput control in idle states
7. Serial clock source selection 2
8. SO1 output level control in idle states
9. Serial clock source selection 1
10. 32-kHz oscillation stop
11. 32-kHz oscillation division ratio
12. System clock selection
13. Bank 0, 1 selection
Figure 5 Special Function Register Area
11

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