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Número de pieza | ICS342 | |
Descripción | FIELD PROGRAMMABLE DUAL OUTPUT SS VERSACLOCK SYNTHESIZER | |
Fabricantes | Integrated Circuit Systems | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de ICS342 (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
No Preview Available ! ICS342
Field Programmable Dual Output SS VersaClock Synthesizer
Description
The ICS342 is a low cost, dual-output, field
programmable clock synthesizer. The ICS342 can
generate two output frequencies from 250 kHz to 200
MHz, using up to two independently configurable PLLs.
The outputs may employ Spread Spectrum techniques
to reduce system electro-magnetic interference (EMI).
Using ICS’ VersaClockTM software to configure the
PLL and output, the ICS342 contains a One-Time
Programmable (OTP) ROM to allow field
programmability. Programming features include 2
selectable configuration registers. Using Phase-Locked
Loop (PLL) techniques, the device runs from a
standard fundamental mode, inexpensive crystal, or
clock. It can replace multiple crystals and oscillators,
saving board space and cost.
The device also has a power down feature that
tri-states the clock outputs and turns off the PLLs when
the PDTS pin is taken low.
The ICS342 is also available in factory programmed
custom versions for high-volume applications.
Features
• 8-pin SOIC package
• Highly accurate frequency generation
• M/N Multiplier PLL: M = 1...2048, N = 1...1024
• Output clock frequencies up to 200 MHz
• Two ROM locations for frequency and spread
selection
• Spread spectrum capability for lower system EMI
• Center or Down Spread up to 4% total
• Selectable 32 kHz or 120 kHz modulation
• Input crystal frequency from 5 to 27 MHz
• Input clock frequency from 2 to 50 MHz
• Operating voltage of 3.3 V
• Advanced, low power CMOS process
• For one output clock, use the ICS341. For three
output clocks, see the ICS343. For more than three
outputs, see the ICS345 or ICS348.
• Available in Pb (lead) free packaging
Block Diagram
SEL
Crystal or
clock input
X1/ICLK
X2
OTP ROM
with PLL
Divider
Values
Crystal
Oscillator
External capacitors are
required with a crystal input.
VDD
PLL Clock Synthesis,
Spred Spectrum and
Control Circuitry
CLK1
CLK2
GND
PDTS (both outputs and PLL)
MDS 342 F
1
Revision 090704
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
1 page ICS342
Field Programmable Dual Output SS VersaClock
Parameter
Output High Voltage
(CMOS High)
Output High Voltage
Output Low Voltage
Short Circuit Current
Nominal Output
Impedance
Internal pull-up resistor
Internal pull-down
resistor
Input Capacitance
Symbol
Conditions
VOH IOH = -4 mA
VOH
VOL
IOS
ZO
IOH = -12 mA
IOL = 12mA
RPUP
RPD
SEL, PDTS pins
CLK output
CIN Inputs
Min. Typ.
VDD-0.4
Max. Units
V
2.4 V
0.4 V
±70 mA
20 Ω
250 kΩ
525 kΩ
4 pF
Note 1: Example with 25 MHz crystal input with two outputs of 33.3 MHz, no load, and VDD = 3.3 V.
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3V ±5%, Ambient Temperature -40 to +85° C
Parameter
Symbol
Conditions
Min. Typ. Max. Units
Input Frequency
FIN Fundamental Crystal
Input Clock
5
2
27 MHz
50 MHz
Output Frequency
0.25 200 MHz
Output Rise Time
Output Fall Time
Duty Cycle
tOR 20% to 80%, Note 1
tOF 80% to 20%, Note 1
Note 2
1
1
40 49-51 60
ns
ns
%
Power-up time
PLL lock time from
power-up, Note 3
4 10 ms
PDTS goes high until
stable CLK output, Spread
Spectrum Off, Note 3
0.2 2 ms
PDTS goes high until
stable CLK output, Spread
Spectrum On, Note 3
4 7 ms
One Sigma Clock Period Jitter Configuration Dependent 50 ps
Maximum Absolute Jitter
tja Deviation from Mean.
Configuration Dependent
+200
ps
Note 1: Measured with 15 pF load.
Note 2: Duty Cycle is configuration dependent. Most configurations are minimum 45% and maximum 55%.
Note 3: ICS test mode output occurs for first 170 clock cycles on CLK2 for each PLL powered up. PDTS
transition high on select address change.
MDS 342 F
5
Revision 090704
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
5 Page |
Páginas | Total 7 Páginas | |
PDF Descargar | [ Datasheet ICS342.PDF ] |
Número de pieza | Descripción | Fabricantes |
ICS341 | Field Programmable SS VersaClock Synthesizer | Integrated Circuit Solution |
ICS342 | FIELD PROGRAMMABLE DUAL OUTPUT SS VERSACLOCK SYNTHESIZER | Integrated Circuit Systems |
ICS343 | Field Programmable Triple Output SS VersaClock Synthesizer | Integrated Circuit Solution |
ICS345 | Triple PLL Field Programmable SS VersaClock Synthesizer | Integrated Circuit Systems |
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