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PDF TC9455N Data sheet ( Hoja de datos )
| Número de pieza | TC9455N | |
| Descripción | (TC9455 / TC9488) TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic | |
| Fabricantes | Toshiba Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de TC9455N (archivo pdf) en la parte inferior de esta página. Total 14 Páginas | ||
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TC9455,88F/N
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC9455F,TC9455N,TC9488F,TC9488N
Digital Echo IC for Karaoke
The TC9455 series are digital echo ICs for karaoke. The ICs
incorporate microphone amps and volume controllers, enabling a
digital echo system to be configured on a single chip.
Features
· Incorporates a two-channel microphone amp with auto level
control (ALC), AD/DA converter, delay memory, and electronic
volume controllers.
· Incorporates a 32-kHz sampling, 12-bit successive comparison
AD/DA converter.
· Incorporates a delay memory (16-Kbit DRAM) which enables
128-ms (typ.) delay.
· Microphone and echo levels are controlled by built-in volume
controllers. They are controlled either by DC voltage or
controlled in serial by the MCU.
TC9455F/N: Supports I2C bus interface
TC9488F/N: Supports three-lead interface
· The system clock is generated by the CR oscillator circuit.
· The echo feedback amount is configured using analog circuits.
The feedback level can be freely set.
· The IC comes in 30-pin flat package or 24-pin shrink DIP.
Pin Connection
TC9455F
TC9488F
TC9455N
TC9488N
Weight:
SSOP30-P-375-1.00: 1.08 g (typ.)
SDIP24-P-300-1.78: 1.2 g (typ.)
1 2002-02-05
1 page  
TC9455,88F/N
3. AD/DA converter and digital delay circuit
The AD/DA converter is a 12-bit successive comparison type. The sampling frequency when the system
clock operates at 4 MHz is 32 kHz.
The analog signal input from the AD converter is converted to 12-bit digital data. The digital delay circuit
compresses the 12-bit signal to 4-bit, writes it to delay RAM, then reads it. The 4-bit data read from delay
RAM is de-compressed to 12-bit. The 12-bit data are converted to analog signals by the DA converter and
output.
The area for delay RAM memory is 4096 words × 4 bits.
The echo delay time is 4096 words × (1/32 kHz) = 128 ms.
Figure 3 is a block diagram of the echo circuit.
Figure 3 Block diagram of echo circuit
5 2002-02-05
5 Page 
TC9455/88F AC Test Circuit
TC9455,88F/N
11 2002-02-05
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet TC9455N.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| TC9455F | (TC9455 / TC9488) TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic | Toshiba Semiconductor |
| TC9455N | (TC9455 / TC9488) TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic | Toshiba Semiconductor |
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