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PDF M3727GM6-XXX Data sheet ( Hoja de datos )
| Número de pieza | M3727GM6-XXX | |
| Descripción | (M3727xx) 8-Bit CMOS Microcomputer | |
| Fabricantes | Renesas Technology | |
| Logotipo |  |
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M3727GM6/M8–XXXSP/FP M37272E8SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION
DECODER and ON-SCREEN DISPLAY CONTROLLER
REJ03B0132-0100Z
Rev.1.00
Apr 01, 2001
1. DESCRIPTION
The M3727GM6/M8-XXXSP/FP are single-chip microcomputers de-
signed with CMOS silicon gate technology. They have a OSD, data
slicer, and I2C-BUS interface, so it is useful for a channel selection
system for TV with a closed caption decoder.
The features of the M37272E8SP/FP are similar to those of the
M3727GM6/M8-XXXSP/FP except that these chips have a built-in
PROM which can be written electrically. The difference between
M3727GM6-XXXSP/FP and M3727GM8-XXXSP/FP are the ROM
size and RAM size. Accordingly, the following descriptions will be for
the M3727GM6-XXXSP/FP.
2. FEATURES
●Number of basic instructions .................................................... 71
●Memory size
ROM .............. 24K bytes
(M3727GM6-XXXSP/FP)
32K bytes
(M3727GM8-XXXSP/FP, M37272E8SP/FP)
RAM ............... 1024 bytes
(M3727GM6-XXXSP/FP)
1152 bytes
(M3727GM8-XXXSP/FP, M37272E8SP/FP)
(*ROM correction memory included)
●Minimum instruction execution time
......................................... 0.5 µs (at 8 MHz oscillation frequency)
●Power source voltage ................................................. 5 V ± 10 %
●Subroutine nesting ............................................. 128 levels (Max.)
●Interrupts ....................................................... 17 types, 16 vectors
●8-bit timers .................................................................................. 6
●Programmable I/O ports (Ports P0, P1, P2, P30, P31) ............. 26
●Input ports (Ports P50, P51) ........................................................ 2
●Output ports (Ports P52–P55) ..................................................... 4
●LED drive ports ........................................................................... 4
●Serial I/O ............................................................ 8-bit ✕ 1 channel
●Multi-master I2C-BUS interface .............................. 1 (2 systems)
●A-D comparator (6-bit resolution) ................................ 6 channels
●PWM output circuit ......................................................... 8-bit ✕ 6
●Power dissipation
In high-speed mode ...................................................... 137.5 mW
(at VCC = 5.5V, 8 MHz oscillation frequency, OSD on, and Data slicer on)
In low-speed mode ......................................................... 0.33 mW
(at VCC = 5.5V, 32 kHz oscillation frequency)
●ROM correction function ................................................ 2 vectors
●Closed caption data slicer
●OSD function
Display characters ................................... 32 characters ✕ 2 lines
(It is possible to display 3 lines or more by software)
Kinds of characters ........................................................ 254 kinds
Character display area ............................ CC mode: 16 ✕ 26 dots
OSD mode: 16 ✕ 20 dots
Kinds of character sizes ..................................... CC mode: 1 kind
OSD mode: 8 kinds
Kinds of character colors .................................. 8 colors (R, G, B)
Coloring unit ................... character, character background, raster
Display position
Horizontal: 128 levels
Vertical: 512 levels
Attribute ........................................................................................
CC mode: smooth italic, underline, flash, automatic solid space
OSD mode: border
Smoth roll-up
Window function
3. APPLICATION
TV with a closed caption decoder
Rev.1.00 Apr 01, 2001 page 1 of 127
REJ03B0132-0100Z
1 page  
M3727GM6/M8–XXXSP/FP M37272E8SP/FP
6. PERFORMANCE OVERVIEW
Table 6.1 Performance Overview
Parameter
Number of basic instructions
Instruction execution time
Clock frequency
Memory size
Input/Output
ports
ROM M3727GM6-XXXSP/FP
M3727GM8-XXXSP/FP, M37272E8SP/FP
RAM M3727GM6-XXXSP/FP
M3727GM8-XXXSP/FP, M37272E8SP/FP
OSD ROM
OSD RAM
P0 I/O
P10–P17
I/O
P20–P27
I/O
P30, P31
P50, P51
P52–P55
Serial I/O
Multi-master I2C-BUS interface
A-D comparator
PWM output circuit
Timers
ROM correction function
Subroutine nesting
Interrupt
I/O
Input
Output
Clock generating circuit
Data slicer
Functions
71
0.5 µs (the minimum instruction execution time, at 8 MHz oscillation fre-
quency)
8 MHz (maximum)
24K bytes
32K bytes
1024 bytes (ROM correction memory included)
1152 bytes (ROM correction memory included)
10K bytes
128 bytes
8-bit ✕ 1 (N-channel open-drain output structure, can be used as PWM
output pins, INT input pins, A-D input pin)
8-bit ✕ 1 (CMOS input/output structure, however, N-channel open-drain
output structure, when P11–P14 are used as multi-master I2C-BUS inter-
face, can be used as OSD output pin, A-D input pins, INT input pin, multi-
master I2C-BUS interface)
8-bit ✕ 1 (P2 is CMOS input/output structure, however, N-channel open-
drain output structure when P20 and 21 are used as serial output, can be
used as serial input/output pins, timer external clock input pins, OSD clock
input/output pin, sub-clock input/output pins)
2-bit ✕ 1 (CMOS input/output or N-channel open-drain output structure,
can be used as A-D input pins)
2-bit ✕ 1 (can be used as OSD input pins)
4-bit ✕ 1 (CMOS output structure, can be used as OSD output pins)
8-bit ✕ 1
1 (2 systems)
6 channels (6-bit resolution)
8-bit ✕ 6
8-bit timer ✕ 6
2 vectors
128 levels (maximum)
<17 types>
INT external interrupt ✕ 3, Internal timer interrupt ✕ 6, Serial I/O interrupt ✕
1, OSD interrupt ✕ 1, Multi-master I2C-BUS interface interrupt ✕ 1, Data
slicer interrupt ✕ 1, f(XIN)/4096 interrupt ✕ 1, VSYNC interrupt ✕ 1, BRK
instruction interrupt ✕ 1, reset ✕ 1
2 built-in circuits (externally connected to a ceramic resonator or a quartz-
crystal oscillator)
Built-in
Rev.1.00 Apr 01, 2001 page 5 of 127
REJ03B0132-0100Z
5 Page 
M3727GM6/M8–XXXSP/FP M37272E8SP/FP
8. FUNCTIONAL DESCRIPTION
8.1 CENTRAL PROCESSING UNIT (CPU)
This microcomputer uses the standard 740 Family instruction set.
Refer to the table of 740 Family addressing modes and machine
instructions or the SERIES 740 <Software> User’s Manual for de-
tails on the instruction set.
Machine-resident 740 Family instructions are as follows:
The FST, SLW instruction cannot be used.
The MUL, DIV, WIT and STP instructions can be used.
8.1.1 CPU Mode Register
The CPU mode register contains the stack page selection bit and
internal system clock selection bit. The CPU mode register is allo-
cated at address 00FB16.
CPU Mode Register
b7 b6 b5 b4 b3 b2 b1 b0
1 1 0 0 CPU mode register (CM) [Address 00FB16]
B Name
0, 1 Processor mode bits
(CM0, CM1)
Functions
After reset R W
b1 b0
0 0: Single-chip mode
0 1:
1 0: Not available
1 1:
0 RW
2 Stack page selection 0: 0 page
bit (CM2) (See note) 1: 1 page
1 RW
3, 4 Fix these bits to “1.”
1 RW
5 XCOUT drivability
selection bit (CM5)
0: LOW drive
1: HIGH drive
6 Main Clock (XIN–XOUT) 0: Oscillating
stop bit
1: Stopped
(CM6)
1 RW
0 RW
7 Internal system clock 0: XIN–XOUT selected
0 RW
selection bit
(high-speed mode)
(CM7)
1: XCIN–XCOUT selected
(high-speed mode)
Note: This bit is set to “1” after the reset release.
Fig. 8.1.1 CPU Mode Register
Rev.1.00 Apr 01, 2001 page 11 of 127
REJ03B0132-0100Z
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