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PDF HM514260C Data sheet ( Hoja de datos )

Número de pieza HM514260C
Descripción 262144-word x 16-bit Dynamic Random Access Memory
Fabricantes Hitachi Semiconductor 
Logotipo Hitachi Semiconductor Logotipo



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HM514260C Series
HM51S4260C Series
262,144-word × 16-bit Dynamic Random Access Memory
ADE-203-260A (Z)
Rev. 1.0
Jun. 12, 1995
Description
The Hitachi HM51(S)4260C is CMOS dynamic RAM organized as 262,144-word × 16-bit. HM51(S)4260C
has realized higher density, higher performance and various functions by employing 0.8 µm CMOS process
technology and some new CMOS circuit design technologies. The HM51(S)4260C offers fast page mode as a
high speed access mode. Multiplexed address input permits the HM51(S)4260C to be packaged in standard
400-mil 40-pin plastic SOJ and standard 400-mil 44-pin plastic TSOPII. Internal refresh timer enables
HM51S4260C self refresh operation.
Features
• Single 5 V (±10%) (HM51(S)4260C-6/7/8)
(±5%) (HM51(S)4260C-6R)
• High speed
— Access time: 60 ns/70 ns/80 ns (max)
• Low power dissipation
— Active mode: 825 mW/788 mW/770 mW/688 mW (max)
— Standby mode: 11 mW (max) (HM51(S)4260C-6/7/8)
10.5 mW (max) (HM51(S)4260C-6R)
1.1 mW (max) (L-version) (HM51(S)4260C-6/7/8)
1.05 mW (max) (L-version) (HM51(S)4260C-6R)
• Fast page mode capability
• 512 refresh cycles: 8 ms
128 ms (L-version)
• 2 CAS-byte control
• 2 variations of refresh
RAS-only refresh
CAS-before-RAS refresh
• Battery backup operation (L-version)
• Self refresh operation (HM51S4260C)

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HM514260C pdf
HM514260C, HM51S4260C Series
Operation Mode
The HM51(S)4260C series has the following 11 operation modes.
1. Read cycle
2. Early write cycle
3. Delayed write cycle
4. Read- modify-write cycle
5. RAS-only refresh cycle
6. CAS-before-RAS refresh cycle
7. Self refresh cycle(HM51S4260C)
8. Fast page mode read cycle
9. Fast page mode early write cycle
10. Fast page mode delayed write cycle
11. Fast page mode read- modify-write cycle
Inputs
RAS LCAS UCAS WE
OE
Output
Operation
H H H D D Open
Standby
H L L H L Valid
Standby
L L L H L Valid
Read cycle
L
LL
L*2 D
Open
Early write cycle
L L L L*2 H Undefined Delayed write cycle
L L L H to L L to H Valid
Read-modify-write cycle
L H H D D Open
RAS-only refresh cycle
H to L H
L
D D Open
CAS-before-RAS refresh cycle
LH
Self refresh cycle (HM51S4260C)
LL
L H to L H to L H L Valid
Fast page mode read cycle
L
H to L H to L L*2
D
Open
Fast page mode early write cycle
L
H to L H to L L*2
H
Undefined Fast page mode delayed write cycle
L H to L H to L H to L L to H Valid
Fast page mode read-modify-write cycle
L L L H H Open Read cycle (Output disabled)
Notes: 1. H: High(inactive) L: Low(active) D: H or L
2. tWCS 0 ns Early write cycle
tWCS < 0 ns Delayed write cycle
3. Mode is determined by the OR function of the UCAS and LCAS. (Mode is set by the earliest of
UCAS and LCAS active edge and reset by the latest of UCAS and LCAS inactive edge.) However
write OPERATION and output HIZ control are done independently by each UCAS, LCAS.
ex. if RAS = H to L, LCAS = L, UCAS = H, then CAS-before-RAS refresh cycle is selected.
5

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HM514260C arduino
Read-Modify-Write Cycle
Parameter
Read-modify-write cycle time
RAS to WE delay time
CAS to WE delay time
Column address to WE delay time
OE hold time from WE
HM514260C, HM51S4260C Series
HM514260C, HM51S4260C
-6/-6R
-7
-8
Symbol Min Max Min Max Min Max
t R WC
t RWD
t CWD
t AWD
t OEH
150
80
35
50
15
180
95
45
60
20
200
105
45
65
20
Unit Notes
ns
ns 10
ns 10
ns 10, 13
ns
Refresh Cycle
Parameter
CAS setup time (CBR refresh cycle)
CAS hold time (CBR refresh cycle)
RAS precharge to CAS hold time
CAS precharge time in normal mode
HM514260C, HM51S4260C
-6/-6R
-7
-8
Symbol Min Max Min Max Min Max
tCSR 10 10 10
tCHR 10 10 10
tRPC 10 10 10
tCPN 10 10 10
Unit Note
ns 19
ns 20
ns 19
ns 22
Fast Page Mode Cycle
HM514260C, HM51S4260C
-6/-6R
-7
-8
Parameter
Symbol Min Max Min Max Min Max Unit Notes
Fast page mode cycle time
Fast page mode CAS precharge time
Fast page mode RAS pulse width
Access time from CAS precharge
t PC
t CP
t RASC
t ACP
40
45
50
ns
10
10
10
ns 22
100000 100000 100000 ns 12
35
40
45
ns 3, 13,
20
RAS hold time from CAS precharge
t RHCP
Fast page mode read-modify-write cycle tCPW
CAS precharge to WE delay time
35
55
40
65
45
70
ns
ns
Fast page mode read-modify-write cycle tPCM
time
80
95
100
ns
11

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