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PDF LH75411 Data sheet ( Hoja de datos )

Número de pieza LH75411
Descripción (LH75400/01/10/11) 16/32-bit Microcontroller With Grayscale LCD Controller
Fabricantes Sharp 
Logotipo Sharp Logotipo



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No Preview Available ! LH75411 Hoja de datos, Descripción, Manual

Data Sheet
LH75400/01/10/11
System-on-Chip
DESCRIPTION
The SHARP BlueStreak LH75400/01/10/11 family
consists of four low-cost 16/32-bit System-on-Chip
(SoC) devices.
• LH75401 — contains the superset of features.
• LH75411 — similar to LH75401, without CAN 2.0B.
• LH75400 — similar to LH75401, but with a Gray-
scale LCDC only.
• LH75410 — similar to LH75400, without CAN 2.0B.
COMMON FEATURES
• Highly Integrated System-on-Chip
• ARM7TDMI-S™ Core
• High Performance (90 MHz CPU Speed)
– Internal PLL Driven or External Clock Driven
– Crystal Oscillator/Internal PLL Can Operate with
Input Frequency Range of 14 MHz to 29 MHz
• 32KB On-chip SRAM
– 16KB Tightly Coupled Memory (TCM) SRAM
– 16KB Internal SRAM
• Clock and Power Management
– Low Power Modes: Standby, Sleep, Stop
• Eight Channel, 10-bit Analog-to-Digital Converter
• Integrated Touch Screen Controller
• Serial interfaces
– Two 16C550-type UARTs supporting baud rates
up to 921,600 baud (requires crystal frequency of
14.756 MHz).
– One 82510-type UART supporting baud rates up
to 3,225,600 baud (requires a system clock of
70 MHz).
• Synchronous Serial Port
– Motorola SPI™
– National Semiconductor Microwire™
– Texas Instruments SSI
• Real-Time Clock (RTC)
• Three Counter/Timers
– Capture/Compare/PWM Compatibility
– Watchdog Timer (WDT)
• Low-Voltage Detector
• JTAG Debug Interface and Boundary Scan
• Single 3.3 V Supply
• 5 V Tolerant Digital I/O
• 144-pin LQFP Package
• -40°C to +85°C Operating Temperature
Unique Features of the LH75401
• Color and Grayscale Liquid Crystal Display (LCD)
Controller
– 12-bit (4,096) Direct Mode Color, up to VGA
– 8-bit (256) Direct or Palletized Color, up to SVGA
– 4-bit (16) Direct Mode Color/Grayscale, up to XGA
– 12-bit Video Bus
– Supports STN, TFT, HR-TFT, and AD-TFT
Displays.
• CAN Controller that supports CAN version 2.0B.
Unique Features of the LH75411
• Color and Grayscale LCD Controller (LCDC)
– 12-bit (4,096) Direct Mode Color, up to VGA
– 8-bit (256) Direct or Palletized Color, up to SVGA
– 4-bit (16) Direct Mode Color/Grayscale, up to XGA
– 12-bit Video Bus
– Supports STN, TFT, HR-TFT, and AD-TFT
Displays.
Unique Features of the LH75400
• Grayscale LCDC
– 4-bit (16 Level) Grayscale, up to XGA
– 8-bit Video Bus
– Supports STN Displays.
• Controller Area Network (CAN) Controller that sup-
ports CAN version 2.0B.
Unique Features of the LH75410
• Grayscale LCDC
– 4-bit (16 Level) Grayscale, up to XGA
– 8-bit Video Bus
– Supports STN Displays.
NOTES:
1. ARM7 Thumb, and ARM7TDMI-S are trademarks of ARM LTD.
2. Motorola SPI is a trademark of Motorola, Inc.
3. Microwire is a trademark of National Semiconductor Corporation.
4. VGA and XGA modes require 66 MHz CPU speed.
5. XTAL inputs are not 5 V tolerant.
6. CPU performance at 1.8 V at 50°C, VDDC supplied externally.
Data Sheet
Version 1.1
1

1 page




LH75411 pdf
System-on-Chip
LH75410 BLOCK DIAGRAM
14 to 29 MHz 32.768 kHz
LH75400/01/10/11
LH75410
OSCILLATOR,
PLL, POWER
MANAGEMENT, and
RESET CONTROL
ARM 7TDMI-S
AHB
INTERFACE
TCM
16KB SRAM
STATIC
MEMORY
CONTROLLER
BROWNOUT
DETECTOR
LINEAR
REGULATOR
ADVANCED HIGH
PERFORMANCE
BUS (AHB)
INTERNAL
16KB SRAM
VECTORED
INTERRUPT
CONTROLLER
4 CHANNEL
DMA
CONTROLLER
ADVANCED
PERIPHERAL
BUS BRIDGE
GRAYSCALE
LCD
CONTROLLER
ADVANCED
PERPHERAL
BUS (APB)
REAL TIME
CLOCK
76-BIT GENERAL
PURPOSE I/O
I/O
CONFIGURATION
SYNCHRONOUS
SERIAL PORT
TIMER (3)
WATCHDOG
TIMER
UART (3)
8 CHANNEL
10-BIT ADC
TOUCH PANEL
INTERFACE
Figure 4. LH75410 Block Diagram
LH75410-1
Data Sheet
Version 1.1
5

5 Page





LH75411 arduino
System-on-Chip
LH75401 Signal Descriptions
Table 2. LH75401 Signal Descriptions
PIN NO. SIGNAL NAME TYPE
DESCRIPTION
1
2
4
5
6
7
9
10
12
D[15:0]
13
15
16
18
19
20
21
22 nWE
23 nOE
24 nWAIT
25 nBLE1
27 nBLE0
28 nCS3
29 nCS2
30 nCS1
31 nCS0
32
33
35
36
37
38
39
40
43
44
45
46
47
A[23:0]
49
50
51
52
53
55
56
57
58
60
61
72 DREQ
73 DACK
MEMORY INTERFACE (MI)
Input/Output Data Input/Output Signals
Output
Output
Input
Output
Output
Output
Output
Output
Output
Static Memory Controller Write Enable
Static Memory Controller Output Enable
Static Memory Controller External Wait Control
Static Memory Controller Byte Lane Strobe
Static Memory Controller Byte Lane Strobe
Static Memory Controller Chip Select
Static Memory Controller Chip Select
Static Memory Controller Chip Select
Static Memory Controller Chip Select
Output Address Signals
Input
Output
DMA CONTROLLER (DMAC)
DMA Request
DMA Acknowledge
LH75400/01/10/11
NOTES
1
2
2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
2
1
1
1
Data Sheet
Version 1.1
11

11 Page







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