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PDF ICS9250-11 Data sheet ( Hoja de datos )
| Número de pieza | ICS9250-11 | |
| Descripción | Frequency Generator & Integrated Buffers for Celeron & PII/III | |
| Fabricantes | Integrated Circuit Systems | |
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Integrated
Circuit
Systems, Inc.
ICS9250-11
Frequency Timing Generator for PENTIUM II/III Systems
General Description
The ICS9250-11 is a main clock synthesizer chip for Pentium
II based systems using Rambus Interface DRAMs. This chip
provides all the clocks required for such a system when used
with a Direct Rambus Clock Generator (DRCG) chip such as
the ICS9212-01, 02, 03 and a PCI buffer 9112-17.
Spread Spectrum may be enabled by driving the SPREAD#
pin active. Spread spectrum typically reduces system EMI by
8dB to 10dB. This simplifies EMI qualification without
resorting to board design iterations or costly shielding. The
ICS9250-11 employs a proprietary closed loop design, which
tightly controls the percentage of spreading over process and
temperature variations.
The CPU/2 clocks are inputs to the DRCG.
Block Diagram
Features
Generates the following system clocks:
- 6 - CPU Clocks 100/133MHz (2.5V).
- 2 - CPU/2 output for synchronous memory
reference (2.5V).
- 4 - fixed frequency Clocks @ 66.6MHz (3.3V).
- 2 - fixed frequency Clocks @ 33.3MHz (3.3V).
- 6 - IOAPIC Clocks @ ¼ of CPUCLK or 16.667MHz,
synchronous to CPU Clock (2.5V)
- 1 - 48MHz Clock (3.3V)
- 2 - REF Clocks @ 14.31818MHz
0.5% typical down spread modulation on CPU, PCI,
IOAPIC, 3V66 and CPU/2 output clocks.
Uses external 14.318MHz crystal.
X1
X2
SPREAD#
OSC
PLL
Spread
Spectrum
/2
SEL 133/100#
SEL(0:1)
C
o
n
t
r
o
l
/3 /2
PLL2
/3
/4
/2
/2
/2
2 REF (0:1)
CPUCLK (0:5)
6
6 IOAPIC(0:5)
2 CPU/2 (0:1)
4 3V66 (0:3)
2 3V33 (0:1)
48MHz
Pin Configuration
Power Groups:
VDDREF, GNDREF = REF, X1, X2
VDD66, GND66 = 3V66
VDD33, GND33 = 3V33
VDD48, GND48 = 48MHz
VDDCOR, GNDCOR = PLL Core
VDDLCPU, GNDLCPU = CPUCLK
VDDLCPU/2 , GNDLCPU/2 = CPU/2
VDDLAPIC, GNDAPIC = IOAPIC
9250-11 Rev C 3/20/00
Third party brands and names are the property of their respective owners.
56-pin SSOP
ICS reserves the right to make changes in the device data identified in this
publication without further notice. ICS advises its customers to obtain the
latest version of all device data to verify that any information being relied
upon by the customer is current and accurate.
1 page  
ICS9250-11
Electrical Characteristics - CPU
TA = 0 - 70C; VDDL = 2.5 V +/-5%; CL = 10-20 pF (unless otherwise specified)
PARAMETER
SYMBOL
CONDITIONS
Output High Voltage VOH2B IOH = -12 mA
Output Low Voltage VOL2B IOL = 12 mA
Output High Current
IOH2B
VOH @ MIN = 1.0 V
VOH @ MAX = 2.375 V
Output Low Current
Rise Time1
Fall Time1
Duty Cycle1
Skew window1
Jitter, cycle-to-cycle1
IOL2B
tr2B
tf2B
dt2B
tsk2B
tjcyc-cyc2B
VOL @ MIN = 1.2 V
VOL @ MAX = 0.3 V
VOL = 0.4 V, VOH = 2.0 V
VOH = 2.0 V, VOL = 0.4 V
VT = 1.25 V
VT = 1.25 V
VT = 1.25 V
1Guaranteed by design, not 100% tested in production.
MIN TYP MAX UNITS
2V
0.4 V
-27
mA
-27
27
mA
30
0.4 1.6 ns
0.4 1.6 ns
45 55 %
175 ps
150 ps
Electrical Characteristics - CPU/2
TA = 0 - 70C; VDDL = 2.5 V +/-5%; CL = 10-20 pF (unless otherwise specified)
PARAMETER
SYMBOL
CONDITIONS
Output High Voltage VOH2B IOH = -12 mA
Output Low Voltage VOL2B IOL = 12 mA
Output High Current
IOH2B
VOH @ MIN = 1.0 V
VOH @ MAX = 2.375 V
Output Low Current
Rise Time1
Fall Time1
Duty Cycle1
Skew window1
Jitter, cycle-to-cycle1
IOL2B
tr2B
tf2B
dt2B
tsk2B
tjcyc-cyc2B
VOL @ MIN = 1.2 V
VOL @ MAX = 0.3 V
VOL = 0.4 V, VOH = 2.0 V
VOH = 2.0 V, VOL = 0.4 V
VT = 1.25 V
VT = 1.25 V
VT = 1.25 V
1Guaranteed by design, not 100% tested in production.
MIN
2
-27
27
0.4
0.4
45
TYP MAX UNITS
V
0.4 V
mA
-27
mA
30
1.6 ns
1.6 ns
55 %
175 ps
250 ps
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet ICS9250-11.PDF ] | |
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