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PDF ICS9250-13 Data sheet ( Hoja de datos )
| Número de pieza | ICS9250-13 | |
| Descripción | Frequency Generator & Integrated Buffers for Celeron & PII/III | |
| Fabricantes | Integrated Circuit Systems | |
| Logotipo |  |
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Integrated
Circuit
Systems, Inc.
ICS9250 - 13
Frequency Generator & Integrated Buffers for PENTIUM/ProTM
General Description
The ICS9250-13 generates all clocks required for high speed
RISC or CISC microprocessor systems such as Intel PentiumPro
or Cyrix. Eight different reference frequency multiplying factors
are externally selectable with smooth frequency transitions.
Spread spectrum may be enabled through I2C programming.
Spread spectrum typically reduces system EMI by 8dB to
10dB. This simplifies EMI qualification without resorting to
board design iterations or costly shielding. The ICS9250-13
employs a proprietary closed loop design, which tightly
controls the percentage of spreading over process and
temperature variations.
Features
3.3V outputs: SDRAM, PCI, REF, 48/24MHz
2.5V or 3.3V outputs: CPU
20 ohm CPU clock output impedance
20 ohm PCI clock output impedance
Skew from CPU (earlier) to PCI clock - 1 to 4 ns,
center 2.6 ns.
No external load cap for CL=18pF crystals
±250 ps CPU, PCI clock skew
400ps (cycle to cycle) CPU jitter
Smooth frequency switch, with selections from
50 to 83.3 MHz CPU.
I2C interface for programming
2ms power up clock stable time
Clock duty cycle 45-55%.
56 pin 300 mil SSOP package
3.3V operation, 5V tolerant input.
Block Diagram
Recomended Application:
440LX/EX type chipset Motherboard single chip
clock solution.
Pin Configuration
Power Groups
VDDREF = REF (0:1), X1, X2
VDDPCI = PCICLK_F, PCICLK(0:5)
VDDSDR = SDRAM (0:11), supply for PLL core,
VDD48 = 24MHz, 48MHz
VDDLIOAPIC = IOAPIC
VDDL2CPU= CPUCLK(0:3)
9250-13 Rev A 3/25/99
56-Pin SSOP
* Internal Pull-up Resistor of
120K to VDD on indicated inputs
Pentium is a trademark of Intel Corporation
I2C is a trademark of Philips Corporation
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.
1 page  
ICS9250 - 13
Serial Configuration Command Bitmap
Byte0: Functionality and Frequency Select Register (default = 0)
Bit Description
Bit 7
0 - ±0.25% Spread Spectrum Modulation
1 - ±0.6% Spread Spectrum Modulation
Bit (2,6:4)
CPUCLK
(MHz)
SDRAM PCICLK
(MHz) (MHz)
0000
90.00
90.00
45.00
0001
89.01
89.01
44.51
0010
88.00
88.00
44.00
0011
86.99
86.99
43.50
0100
85.91
85.91
42.95
0101
85.01
85.01
42.51
Bit
(2,6:4)
0110
0111
84.00
82.00
84.00
82.00
42.00
41.00
1000
81.01
81.01
40.51
1001
80.00
80.00
40.00
1010
83.31
83.31
41.65
1011
68.49
68.49
34.24
1100
78.00
78.00
39.00
1101
75.00
75.00
37.50
1110
71.99
71.99
35.99
1111
66.82
66.82
33.41
0-Frequency is selected by hardware select,
Bit 3 latched inputs
1- Frequency is selected by Bit 2,6:4
Bit 1
0 - Normal operation
1 - Spread Spectrum Enabled
Bit 0
0 - Running
1 - Tristate all outputs
PWD
1
XXX
Note 1
0
1
0
Note 1. Default at Power-up will be for latched logic inputs to define frequenc,. Bits 2, 6:4 are default to 0000.
5
5 Page 
ICS9250 - 13
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND 0.5 V to VDD +0.5 V
Ambient Operating Temperature . . . . . . . . . . . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . 65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect product reliability.
Electrical Characteristics - Input/Supply/Common Output Parameters
TA = 0 - 70C; Supply Voltage VDD = 3.3 V ±5% VDDL = 2.5V ± 5% (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Input High Voltage
Input Low Voltage
Input High Current
VIH
VIL
IIH VIN = VDD
2
VSS-0.3
VDD+0.3
0.8
0.1 5
V
V
µA
Input Low Current
Input Low Current
Operating Supply Current
Input Frequency
IIL1
IIL2
IDD2.5OP
Fi
VIN = 0 V; Inputs with no pull-up resistors
VIN = 0 V; Inputs with pull-up resistors
CL = 0 pF; Select @ 66MHz
VDD = 3.3 V
-5
-200
12
2.0
-100
14.32
160
16
µA
µA
mA
MHz
Input Capacitance1
Transition Time1
Settling Time1
Clk Stabilization1
Skew1
CIN Logic Inputs
CINX X1 & X2 pins
TTrans To 1st crossing of target Freq.
Ts
TSTAB From VDD = 3.3 V to 1% target Freq.
TCPU-PCI2 VT = 1.5 V
TCPU-SDRAM2 VT = 1.5 V
5
27 36
45
1.3 2
0.3
<2 2
1 2.15
4
70 500
pF
pF
ms
ms
ns
ps
1Guaranteed by design, not 100% tested in production.
Electrical Characteristics - Input/Supply/Common Output Parameters
TA = 0 - 70º C; Supply Voltage VDD = 3.3 V +/-5%, VDDL = 2.5 V +/-5% (unless otherwise stated)
PARAMETER SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Operating Supply Current
Skew1
IDD2.5OP CL = 0 pF; Select @ 66.8 MHz
TCPU-PCI2 VT=1.5 V; VTL=1.25 V
TCPU-SDRAM2 VT=1.5 V;VTL=1.25 V
20 mA
1 2.15 4
ns
70 500 ps
1Guaranteed by design, not 100% tested in production.
11
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet ICS9250-13.PDF ] | |
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