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PDF ICS9250-28 Data sheet ( Hoja de datos )
| Número de pieza | ICS9250-28 | |
| Descripción | Frequency Generator & Integrated Buffers for Celeron & PII/III | |
| Fabricantes | Integrated Circuit Systems | |
| Logotipo |  |
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Integrated
Circuit
Systems, Inc.
ICS9250-28
Frequency Generator & Integrated Buffers for Celeron & PII/III™
Recommended Application:
810/810E and 815 type chipset.
Output Features:
• 2 CPU (2.5V) (up to 133MHz achievable through I2C)
• 13 SDRAM (3.3V) (up to 133MHz achievable
through I2C)
• 2 PCI (3.3 V) @33.3MHz
• 1 IOAPIC (2.5V) @ 33.3 MHz
• 3 Hublink clocks (3.3 V) @ 66.6 MHz
• 2 (3.3V) @ 48 MHz (Non spread spectrum)
• 1 REF (3.3V) @ 14.318 MHz
Features:
• Supports spread spectrum modulation,
0 to -0.5% down spread.
• I2C support for power management
• Efficient power management scheme through PD#
• Uses external 14.138 MHz crystal
• Alternate frequency selections available through I2C
control.
Pin Configuration
IOAPIC
VDDL
GND
*FS1/REF0
VDDREF
X1
X2
GND
VDD3V66
3V66_0
3V66_1
3V66_2
GND
VDDPCI
PCICLK0
PCICLK1
GND
FS0
GND
VDDA
PD#
SCLK
SDATA
GND
VDD48
48MHz_0
48MHz_1
FS2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56 VDDL
55 GND
54 CPUCLK0
53 CPUCLK1
52 GND
51 SDRAM0
50 SDRAM1
49 VDDSDR
48 GND
47 SDRAM2
46 SDRAM3
45 SDRAM4
44 VDDSDR
43 GND
42 SDRAM5
41 SDRAM6
40 VDDSDR
39 GND
38 SDRAM7
37 SDRAM8
36 SDRAM9
35 VDDSDR
34 GND
33 SDRAM10
32 SDRAM11
31 VDDSDR
30 GND
29 SDRAM12
56-Pin 300mil SSOP
* This input has a 50KW pull-down to GND.
Block Diagram
X1 XTAL
X2 OSC
PLL1
Spread
Spectrum
/2 /3
FS(2:0)
PD#
SDATA
SCLK
Control
Logic
Config
Reg
PLL2
/2
/2
Functionality
FS2 FS0 FS1
Function
0 0 X Tristate
0 1 X Test
REF0
1
0
0
Active CPU = 66MHz
SDRAM = 100MHz
1
1
0
Active CPU = 100MHz
SDRAM = 100MHz
2 CPU66/100/133 [1:0]
1
0
1
Active CPU = 133MHz
SDRAM = 133MHz
3V66 (2:0)
3
SDRAM (12:0)
13
1
1
1
Active CPU = 133MHz
SDRAM = 100MHz
PCICLK (1:0)
2
IOAPIC
2 48MHz (1:0)
Power Groups
Analog
VDDREF = X1, X2
VDDA = PLL1
VDD48 = PLL2
Digital
VDD3V66, VDDPCI
VDDSDR, VDDL
9250-28 Rev B 10/26/00
Third party brands and names are the property of their respective owners.
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.
1 page  
ICS9250-28
Byte 0: Control Register
(1 = enable, 0 = disable)
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin#
Name
- Reserved ID
- Reserved ID
- Reserved ID
- Reserved ID
-
SpreadSpectrum
(1=On/0=Off)
27 48MHz 1
26 48MHz 0
- Reserved ID
PWD Description
0 (Active/Inactive)
0 (Active/Inactive)
0 (Active/Inactive)
1 (Active/Inactive)
1 (Active/Inactive)
1 (Active/Inactive)
1 (Active/Inactive)
0 (Active/Inactive)
Note: Reserved ID bits must be written as "0"
Byte 1: Control Register
(1 = enable, 0 = disable)
Bit Pin#
Name
Bit 7 38 SDRAM7
Bit 6 41 SDRAM6
Bit 5 42 SDRAM5
Bit 4 45 SDRAM4
Bit 3 46 SDRAM3
Bit 2 47 SDRAM2
Bit 1 50 SDRAM1
Bit 0 51 SDRAM0
PWD Description
1 (Active/Inactive)
1 (Active/Inactive)
1 (Active/Inactive)
1 (Active/Inactive)
1 (Active/Inactive)
1 (Active/Inactive)
1 (Active/Inactive)
1 (Active/Inactive)
Byte 2: Control Register
(1 = enable, 0 = disable)
Bit Pin#
Name
Bit 7 12 3V66-2 (AGP)
Bit 6 29 SDRAM12
Bit 5 32 SDRAM11
Bit 4 33 SDRAM10
Bit 3 36 SDRAM9
Bit 2 37 SDRAM8
Bit 1 16 PCICLK1
Bit 0 - Reserved
PWD Description
1 (Active/Inactive)
1 (Active/Inactive)
1 (Active/Inactive)
1 (Active/Inactive)
1 (Active/Inactive)
1 (Active/Inactive)
1 (Active/Inactive)
0 (Active/Inactive)
Notes:
1. Inactive means outputs are held LOW and are disabled from switching. These outputs are designed to be
configured at power-on and are not expected to be configured during the normal modes of operation.
2. PWD = Power on Default
3. Undefined bit can be wirtten with either a "1" or "0".
5
5 Page 
ICS9250-28
Electrical Characteristics - 48MHz_1 (Pin 27)
TA = 0 - 70C; VDD = 3.3 V +/-5%; CL = 10-15 pF (unless otherwise specified)
PARAMETER
SYMBOL
CONDITIONS
Output Impedance
Output Impedance
Output High Voltage
Output Low Voltage
Output High Current
Output Low Current
Rise Time1
Fall Time1
Duty Cycle1
Jitter, Cycle-to-cycle1
RDSP3B1
RDSN3B1
VOH3
VOL3
IOH3
IOL3
tr3
tf3
dt3
tjcyc-cyc3B
VO = VDD*(0.5)
VO = VDD*(0.5)
IOH = -1 mA
IOL = 1 mA
VOH @ MIN = 2.0 V
VOH @ MAX = 3.135 V
VOL @ MIN = 1.0 V
VOL @ MAX = 0.4 V
VOL = 0.4 V, VOH = 2.4 V
VOH = 2.4 V, VOL = 0.4 V
VT = 1.5 V
VT = 1.5 V
1Guaranteed by design, not 100% tested in production.
MIN
10
10
2.4
-54
54
0.4
0.4
45
TYP
15
15
-82
-20
95
28
1.1
1.3
53
145
MAX
24
24
0.55
UNITS
Ω
Ω
V
V
mA
-46
mA
53
1.6 ns
1.6 ns
55 %
500 ps
11
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet ICS9250-28.PDF ] | |
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