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IN74HC165A fiches techniques PDF

IK Semiconductor - 8-Bit Parallel-in Serial-Out Shift Register

Numéro de référence IN74HC165A
Description 8-Bit Parallel-in Serial-Out Shift Register
Fabricant IK Semiconductor 
Logo IK Semiconductor 





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IN74HC165A fiche technique
TECHNICAL DATA
8-Bit Serial or Parallel-Input/
Serial-Output Shift Register
High-Performance Silicon-Gate CMOS
The IN74HC165A is identical in pinout to the LS/ALS165. The
device inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
This device is an 8-bit shift register with complementary outputs from
the last stage. Data may be loaded into the register either in parallel or in
serial form. When the Serial Shift/ Parallel Load input is low, the data is
loaded asynchronously in parallel. When the Serial Shift/Parallel Load
input is high, the data is loaded serially on the rising edge of either Clock
or Clock Inhibit (see the Function Table).
The 2-input NOR clock may be used either by combining two
independent clock sources or by designating one of the clock inputs to act
as a clock inhibit.
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 µA
High Noise Immunity Characteristic of CMOS Devices
IN74HC165A
ORDERING INFORMATION
IN74HC165AN Plastic
IN74HC165AD SOIC
TA = -55° to 125° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
PIN 16=VCC
PIN 8 = GND
FUNCTION TABLE
Inputs
Internal Stages Output
Serial Shift/ Clock Clock S A-H QA QB-QG
Parallel Load
Inhibit A
QH
L
H
X X a...h a
b-g
h
H L LX
H L HX
mH L
.coH L
LX
HX
uH X H X X
t4H H X X X
eH L L X X
heX = Don’t Care
www.datasQAn-QFn = Data shifted from the preceding stage
L QAn-QFn QGn
H QAn-QFn QGn
L QAn-QFn QGn
H QAn-QFn QGn
no change
no change
Operation
Asynchronous Parallel Load
Serial Shift via Clock
Serial Shift via Clock
Inhibit
Inhibited Clock
No Clock
1

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