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Número de pieza | UPD4443362 | |
Descripción | 4M-BIT CMOS SYNCHRONOUS FAST STATIC RAM 128K-WORD BY 36-BIT HSTL INTERFACE | |
Fabricantes | NEC | |
Logotipo | ||
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No Preview Available ! DATA SHEET
MOS INTEGRATED CIRCUIT
µPD4443362
4M-BIT CMOS SYNCHRONOUS FAST STATIC RAM
128K-WORD BY 36-BIT
HSTL INTERFACE / REGISTER-REGISTER / LATE WRITE
Description
The µPD4443362 is a 131,072 words by 36 bits synchronous static RAM fabricated with advanced CMOS
technology using Full-CMOS six-transistor memory cell.
The µPD4443362 is suitable for applications which require synchronous operation, high-speed, low voltage, high-
density memory and wide bit configuration, such as cache and buffer memory.
The µPD4443362 is packaged in 100-pin plastic LQFP with a 1.4 mm package thickness for high density and low
capacitive loading.
Features
• Fully synchronous operation
• HSTL Input / Output levels
5 • Fast clock access time : 3.8 ns (133 MHz)
• Asynchronous output enable control : /G
• Byte write control : /SBa (DQa1-9), /SBb (DQb1-9), /SBc (DQc1-9), /SBd (DQd1-9)
• Common I/O using three-state outputs
• Internally self-timed write cycle
• Late write with 1 dead cycle between Read-Write
• 3.3 V (Chip) / 1.5 V (I/O) supply
• 100-pin plastic LQFP package, 14 mm x 20 mm
• Sleep Mode : ZZ (Enables sleep mode, active high)
5 Ordering Information
Part number
µPD4443362GF-A75
Access time
3.8 ns
Clock frequency
133 MHz
Package
100-PIN PLASTIC LQFP (14 x 20)
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. M14439EJ2V0DS00 (2nd edition)
Date Published February 2001 NS CP(K)
Printed in Japan
The mark 5 shows major revised points.
©
2000
1 page µPD4443362
Synchronous Truth Table
ZZ /SS /SW /SBa /SBb /SBc /SBd
LH× × × × ×
L LH× × × ×
LLLLLLL
L L L LHHH
L L LHL L L
L L LHHHH
H× × × × × ×
Remark × : Don’t care
Mode
DQa1–9 DQb1–9 DQc1–9 DQd1–9 Power
Not selected Hi-Z Hi-Z Hi-Z Hi-Z Active
Read
Dout Dout Dout Dout Active
Write
Din Din Din Din Active
Write
Din Hi-Z Hi-Z Hi-Z Active
Write
Hi-Z Din Din Din Active
Abort Write Hi-Z Hi-Z Hi-Z Hi-Z Active
Sleep Mode Hi-Z Hi-Z Hi-Z Hi-Z Standby
Output Enable Truth Table
Mode
Read
Read
Sleep (ZZ=H)
5 Write (/SW=L)
Deselect (/SS=H)
Remark × : Don’t care
/G
L
H
×
×
×
DQ
Dout
Hi-Z
Hi-Z
Hi-Z, Din
Hi-Z
Data Sheet M14439EJ2V0DS
5
5 Page Write Operation
/K
K
tKHAX
tKHKH
tAVKH
tKHKL
tKLKH
Address
l
mn o
p
q
r
s
t
u
v
tKHSX
tSVKH
/SS
/SW
/SBx
tKHWX
tWVKH
tKHWX
tWVKH
/G
tGHQZ
tGLQX
tGLQV
tKHQZ
tKHQX2
DQ
Ql Dn
Qo Qp Qq
Ds
Qt
tDVKH
tKHDX
11 Page |
Páginas | Total 16 Páginas | |
PDF Descargar | [ Datasheet UPD4443362.PDF ] |
Número de pieza | Descripción | Fabricantes |
UPD4443362 | 4M-BIT CMOS SYNCHRONOUS FAST STATIC RAM 128K-WORD BY 36-BIT HSTL INTERFACE | NEC |
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