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GM71VS64403AL fiches techniques PDF

Hynix Semiconductor - (GM71VS64403AL / GM71V64403A) 16M x 4-Bit CMOS DRAM

Numéro de référence GM71VS64403AL
Description (GM71VS64403AL / GM71V64403A) 16M x 4-Bit CMOS DRAM
Fabricant Hynix Semiconductor 
Logo Hynix Semiconductor 





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GM71VS64403AL fiche technique
LG Semicon Co.,Ltd.
GM71V64403A
GM71VS64403AL
16,777,216 WORDS x 4 BIT
CMOS DYNAMIC RAM
Description
Pin Configuration
The GM71V(S)64403A/AL is the new generation
dynamic RAM organized 16,777,216 words by 4bits.
The GM71V(S)64403A/AL utilizes advanced CMOS
Silicon Gate Process Technology as well as
advanced circuit techniques for wide operating
margins, both internally and to the system user.
System oriented features include single power supply
of 3.3V+/-10% tolerance, direct interfacing
capability with high performance logic families such
as Schottky TTL.
The GM71V(S)64403A/AL offers Extended Data
Out(EDO) Mode as a high speed access mode.
Features
* 16,777,216 Words x 4 Bit
* Extended Data Out (EDO) Mode Capability
* Fast Access Time & Cycle Time
(Unit: ns)
tRAC tAA tCAC tRC
tHPC
GM71V(S)64403A/AL-5 50 25 13 84 20
GM71V(S)64403A/AL-6 60 30 15 104 25
32 SOJ / TSOP II
VCC 1
IO0 2
IO1 3
NC 4
NC 5
NC 6
VCC 7
/WE 8
/RAS 9
A0 10
A1 11
A2 12
A3 13
A4 14
A5 15
VCC 16
32 VSS
31 IO3
30 IO2
29 NC
28 NC
27 VSS
26 /CAS
25 /OE
24 A12
23 A11
22 A10
21 A9
20 A8
19 A7
18 A6
17 VSS
*Power dissipation
- Active : 504mW/432mW(MAX)
- Standby : 1.8 mW ( CMOS level : MAX )
0.54mW ( L-Version : MAX)
*EDO page mode capability
*Access time : 50ns/60ns (max)
*Refresh cycles
- RAS only Refresh
8192 cycles/64 §Â (GM71V64403A)
8192 cycles/128§Â (GM71VS64403AL)(L_Version)
*CBR & Hidden Refresh
4096 cycles/64 §Â (GM71V64403A)
m4096 cycles/128 §Â (GM71VS64403AL)( L-Version )
o*4 variations of refresh
.c-RAS-only refresh
u-CAS-before-RAS refresh
t4-Hidden refresh
-Self refresh (L-Version)
ee*Single Power Supply of 3.3V+/-10 % with a built-in VBB generator
www.datash*Battery Back Up Operation ( L-Version )
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