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GM71VS65803AL fiches techniques PDF

Hynix Semiconductor - (GM71VS65803AL / GM71V65803A) 8M x 8-Bit CMOS DRAM

Numéro de référence GM71VS65803AL
Description (GM71VS65803AL / GM71V65803A) 8M x 8-Bit CMOS DRAM
Fabricant Hynix Semiconductor 
Logo Hynix Semiconductor 





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GM71VS65803AL fiche technique
LG Semicon Co.,Ltd.
GM71V65803A
GM71VS65803AL
8,388,608 WORDS x 8 BIT
CMOS DYNAMIC RAM
Description
Pin Configuration
The GM71V(S)65803A/AL is the new generation
dynamic RAM organized 8,388,608 words by 8bits.
The GM71V(S)65803A/AL utilizes advanced CMOS
Silicon Gate Process Technology as well as
advanced circuit techniques for wide operating
margins, both internally and to the system user.
System oriented features include single power supply
of 3.3V+/-10% tolerance, direct interfacing
capability with high performance logic families such
as Schottky TTL.
The GM71V(S)65803A/AL offers Extended Data
Out (EDO) Mode as a high speed access mode.
Features
* 8,388,608 Words x 8 Bit
* Extended Data Out (EDO) Mode Capability
* Fast Access Time & Cycle Time
(Unit: ns)
tRAC tAA tCAC tRC
tHPC
GM71V(S)65803A/AL-5 50 25 13 84 20
GM71V(S)65803A/AL-6 60 30 15 104 25
32 SOJ / TSOP II
VCC 1
IO0 2
IO1 3
IO2 4
IO3 5
NC 6
VCC 7
/WE 8
/RAS 9
A0 10
A1 11
A2 12
A3 13
A4 14
A5 15
VCC 16
32 VSS
31 IO7
30 IO6
29 IO5
28 IO4
27 VSS
26 /CAS
25 /OE
24 NC
23 A11
22 A10
21 A9
20 A8
19 A7
18 A6
17 VSS
*Power dissipation
- Active : 702mW/630mW(MAX)
- Standby : 1.8 mW ( CMOS level : MAX )
0.54mW ( L-Version : MAX)
*EDO page mode capability
*Access time : 50ns/60ns (max)
*Refresh cycles
- RAS only Refresh
4096 cycles/64 §Â (GM71V65803A)
4096 cycles/128§Â (GM71VS65803AL)(L_Version)
*CBR & Hidden Refresh
4096 cycles/64 §Â (GM71V65803A)
m4096 cycles/128 §Â (GM71VS65803AL)( L-Version )
o*4 variations of refresh
.c-RAS-only refresh
u-CAS-before-RAS refresh
t4-Hidden refresh
-Self refresh (L-Version)
ee*Single Power Supply of 3.3V+/-10 % with a built-in VBB generator
www.datash*Battery Back Up Operation ( L-Version )
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