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PDF 5962-87679 Data sheet ( Hoja de datos )

Número de pieza 5962-87679
Descripción Hermetically Sealed / Transistor Output Optocouplers for Analog and Digital Applications
Fabricantes Hewlett-Packard 
Logotipo Hewlett-Packard Logotipo



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H
Hermetically Sealed, Transistor
Output Optocouplers for Analog
and Digital Applications
Technical Data
4N55*
5962-87679
HCPL-553X
HCPL-653X
HCPL-655X
5962-90854
HCPL-550X
*See matrix for available extensions.
Features
• Dual Marked with Device
Part Number and DESC
Drawing Number
• Manufactured and Tested on
a MIL-PRF-38534 Certified
Line
• QML-38534, Class H and K
• Five Hermetically Sealed
Package Configurations
• Performance Guaranteed,
Over -55°C to +125°C
• High Speed: Typically
400 kBit/s
• 9 MHz Bandwidth
• Open Collector Output
• 2-18 Volt VCC Range
• 1500 Vdc Withstand Test
Voltage
• High Radiation Immunity
• 6N135, 6N136, HCPL-2530/
-2531, Function
Compatibility
• Reliability Data
Applications
• Military and Space
• High Reliability Systems
• Vehicle Command, Control,
Life Critical Systems
• Line Receivers
• Switching Power Supply
• Voltage Level Shifting
• Analog Signal Ground
Isolation (see Figures 7, 8,
and 13)
• Isolated Input Line Receiver
• Isolated Output Line Driver
• Logic Ground Isolation
• Harsh Industrial
Environments
• Isolation for Test
Equipment Systems
Description
These units are single, dual and
quad channel, hermetically sealed
optocouplers. The products are
capable of operation and storage
over the full military temperature
range and can be purchased as
either standard product or with
full MIL-PRF-38534 Class Level
H or K testing or from the
appropriate DESC Drawing. All
devices are manufactured and
tested on a MIL-PRF-38534
certified line and are included in
the DESC Qualified
Manufacturers List QML-38534
for Hybrid Microcircuits.
Each channel contains a GaAsP
light emitting diode which is
optically coupled to an integrated
photon detector. Separate
connections for the photodiodes
and output transistor collectors
improve the speed up to a
hundred times that of a conven-
tional phototransistor
optocoupler by reducing the
base-collector capacitance.
These devices are suitable for
wide bandwidth analog applica-
tions, as well as for interfacing
TTL to LSTTL or CMOS. Current
Transfer Ratio (CTR) is 9% mini-
mum at IF = 16 mA. The 18 V VCC
Truth Table
(Positive Logic)
Input
On (H)
Off (L)
Output
L
H
Functional Diagram
Multiple Channel Devices
Available
VCC
VB
VO
GND
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to
prevent damage and/or degradation which may be induced by ESD.
5965-3002E
1-559

1 page




5962-87679 pdf
Hermetic Optocoupler Options
Option
100
Description
Surface mountable hermetic optocoupler with leads trimmed for butt joint assembly. This
option is available on commercial and hi-rel product in 8 and 16 pin DIP (see drawings below
for details).
4.32 (0.170)
MAX.
0.51 (0.020)
MIN.
2.29 (0.090)
2.79 (0.110)
1.14 (0.045)
1.40 (0.055)
0.51 (0.020)
MAX.
4.32 (0.170)
MAX.
0.51 (0.020)
MIN.
2.29 (0.090)
2.79 (0.110)
1.14 (0.045)
1.40 (0.055)
0.51 (0.020)
MAX.
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
0.20 (0.008)
0.33 (0.013)
7.36 (0.290)
7.87 (0.310)
200 Lead finish is solder dipped rather than gold plated. This option is available on commercial
and hi-rel product in 8 and 16 pin DIP. DESC drawing part numbers contain provisions for
lead finish. All leadless chip carrier devices are delivered with solder dipped terminals as a
standard feature.
300 Surface mountable hermetic optocoupler with leads cut and bent for gull wing assembly. This
option is available on commercial and hi-rel product in 8 and 16 pin DIP (see drawings below
for details). This option has solder dipped leads.
0.51 (0.020)
MIN.
2.29 (0.090)
2.79 (0.110)
5.57 (0.180)
MAX.
1.40 (0.055)
1.65 (0.065)
0.51 (0.020)
MAX.
5.57 (0.180)
MAX.
0.51 (0.020)
MIN.
2.29 (0.090)
2.79 (0.110)
1.40 (0.055)
1.65 (0.065)
0.51 (0.020)
MAX.
5° MAX.
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
0.20 (0.008)
0.33 (0.013)
9.65 (0.380)
9.91 (0.390)
5.57 (0.180)
MAX.
1-563

5 Page





5962-87679 arduino
IF
RM
B
A
D.U.T.
VCC
+5 V
RL
VO
VFF
GND
SINGLE CHANNEL OR
COMMON VCC DEVICES
VCM
+–
PULSE GEN.
NOTE: BASE LEAD NOT CONNECTED.
Figure 10. Test Circuit for Transient Immunity and Typical Waveforms.
5 V VCC
220
TTL
D.U.T.
VCC
RL
GND
EACH CHANNEL
LOGIC GATE
0.01 µF
Figure 11. Recommended Logic Interface.
Logic Family
LSTTL
CMOS
Device No.
54LS14 CD40106BM
VCC 5 V 5 V 15 V
RL 5% Tolerance 18 k* 8.2 k22 k
*The equivalent output load resistance is affected by the
LSTTL input current and is approximately 8.2 k.
This is a worst case design which takes into account 25%
degradation of CTR. See App. Note 1002 to assess actual
degradation and lifetime.
(EACH INPUT)
+–
VIN
D.U.T.*
VCC
VO
GND
VCC
VOC
0.1 µF
(EACH OUTPUT)
NOMINAL CONDITIONS
PER CHANNEL: IF = 20 mA
IO = 4 mA
ICC = 30 µA
NOTE: BASE LEAD NOT CONNECTED.
TA = +125 °C
Figure 12. Operating Circuit for Burn-In and Steady State
Life Tests. All Channels Tested Simultaneously.
1-569

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