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PDF TC90A67F Data sheet ( Hoja de datos )

Número de pieza TC90A67F
Descripción TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
Fabricantes Toshiba Semiconductor 
Logotipo Toshiba Semiconductor Logotipo



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No Preview Available ! TC90A67F Hoja de datos, Descripción, Manual

Preliminary TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC90A67F
TC90A67F
Single Chip Picture-in-Picture IC (PAL/NTSC)
TC90A67F is a Picture-in-Picture (PIP) IC including a PIP
controller and a PAL/NTSC decoder function on a chip.
TC90A67F has an ADC, a video decoder, a vertical filter, a field
memory, DACs and so on, so that it is easy to design a PIP
application with the least external components.
Features
Video Decoder for the Sub-Picture
· NTSC, PAL (Europe), M-PAL and N-PAL systems
· Automatic color system identification
· 8-bit ADC for a composite video input
· Y/C separation by built-in digital filters
· ACC, Color killer circuits
· Contrast, Brightness, Tint and Color level controls
· Accessible V-chip signal data via. IIC bus
Weight: 1.6 g (typ.)
Main-Picture System Clock
· External PLL circuit for main-picture system clock (A recommended IC TI: TLC2933)
PIP Controller
· 525-60 Hz, 626-50 Hz and mixed are available
· Vertical filter
· Field memory (181 kbit)
· PIP mode: Single PIP with 1/9 or 1/16 size, 6 PIPs with 1/36 size
· Flexible PIP position
· 3ch 8-bit DACs for YUV or RGB outputs
· YUV to RGB converter
Others
· 42 MHz crystal oscillator
· I2C bus control
· Package: QFP80
· Power supply: 3.3 V
1 2002-02-06

1 page




TC90A67F pdf
PIN Name I/O
Function
42 CKILL
O Color killer detection output (sub picture)
43 VCHIP
I 23rd-line detect signal output
44 RESET
I Reset input
45 VDD ¾ Power supply for digital circuit
46 SDA I/O I2C BUS data input, data and acknowledge output
47 SCL
I I2C BUS clock input
48 NC ¾
49 PIPEN
I PIP enable
50 YS O Main, sub-picture switching pulse
51 NC ¾
52 VSS O Ground for digital circuit
53 PVD
I Vertical sync. input (main picture)
54 VDD O Power supply for digital component
55 NC ¾
56 PHREF O Horizontal sync. output (main picture)
57 CKPSEL
I CKP frequency selection
58 CKP
I Clock input (main-picture)
59 VSS ¾ Ground for digital circuit
60 PHD
I Horizontal sync. input (main picture)
61 NC ¾
62 TESTM0
I Test pin
63 TESTM1
I Test pin
64 TESTM2
I Test pin
65 TEST2
I Test pin
66 VDD ¾ Power supply for digital circuit
67 VSS ¾ Ground for digital circuit
68 NC ¾
69 NC ¾
70 VREFD
I Lower limit reference voltage of DAC
71 BIAS2 ¾ DAC bias reference voltage
72 NC ¾
73 BIAS1 ¾ DAC bias reference voltage
74 NC ¾
75 AVDD ¾ Power supply for DAC
76 BOUT
O Analog signal output (B-Y or B)
77 AVSS ¾ Ground for DAC
78 ROUT O Analog signal output (R-Y or R)
79 AVDD ¾ Power supply for DAC
80 YOUT
O Analog signal output (Y or G)
TC90A67F
Condition
H: color killer ON,
L: OFF
23rd-line: H
L: reset
normal: H
sub-picture: high
normal: negative
L: 24 MHz, H: 48 MHz
normal: positive
normal: H
normal: H
normal: H
normal: H
normal: 1.8 V
5 2002-02-06

5 Page





TC90A67F arduino

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