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ADP3181 Datasheet دیتاشیت PDF دانلود

دیتاشیت - Analog Devices - Synchronous Buck Controller

شماره قطعه ADP3181
شرح مفصل Synchronous Buck Controller
تولید کننده Analog Devices 
آرم Analog Devices 


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ADP3181 شرح
5-Bit or 6-Bit Programmable 2-,3-,4-Phase
Synchronous Buck Controller
ADP3181
FEATURES
Selectable 2-, 3- or 4-phase operation at up to 1 MHz per
phase
±14.5 mV worst-case mV differential sensing error over
temperature
Logic-level PWM outputs for interface to external high
power drivers
Active current balancing between all output phases
Built-in power good/crowbar blanking supports on-the-fly
VID code changes
Digitally programmable output can be switched between
VRM 9 (5-bit) and VRD 10 (6-bit) VID codes
Programmable short-circuit protection with programmable
latch-off delay
APPLICATIONS
Desktop PC power supplies for:
Next-generation Intel® processors
VRM modules
GENERAL DESCRIPTION
The ADP3181 is a highly efficient multiphase synchronous
buck-switching regulator controller optimized for converting
a 12 V main supply into the core supply voltage required by
high performance Intel processors. It uses an internal 6-bit
DAC to read a voltage identification (VID) code directly from
the processor, which is used to set the output voltage. The
CPUID input selects whether the DAC codes match the
VRM 9 or VRD 10 specifications. It uses a multimode PWM
architecture to drive the logic-level outputs at a programmable
switching frequency that can be optimized for VR size and
efficiency. The phase relationship of the output signals can
be programmed to provide 2-, 3-, or 4-phase operation,
allowing for the construction of up to four complementary
buck-switching stages.
The ADP3181 also includes programmable no-load offset and
slope functions to adjust the output voltage as a function of the
load current so that it is always optimally positioned for a
system transient. The ADP3181 provides accurate and reliable
short-circuit protection, adjustable current limiting, and a
delayed power good output that accommodates on-the-fly
output voltage changes requested by the CPU.
The device is specified over the commercial temperature range
of 0°C to +85°C and is available in a 28-lead TSSOP package.
FUNCTIONAL BLOCK DIAGRAM
VCC
28
EN 11
UVLO
SHUTDOWN
AND BIAS
GND 19
DAC + 300mV
CSREF
DAC – 250mV
PWRGD 10
DELAY
RAMPADJ RT
14 13
OSCILLATOR
CMP
ADP3181
SET EN
RESET
27 PWM1
CURRENT-
BALANCING
CIRCUIT
CMP
CMP
RESET
2-/3-/4-PHASE
DRIVER LOGIC
RESET
26 PWM2
25 PWM3
CMP RESET
24 PWM4
CROWBAR
CURRENT
LIMIT
ILIMIT 15
EN
DELAY 12
COMP 9
SOFT
START
CURRENT-
LIMITING
CIRCUIT
23 SW1
22 SW2
21 SW3
20 SW4
17 CSSUM
16 CSREF
18 CSCOMP
8 FB
http://www.DataSheet4U.net/
PRECISION
REFERENCE
VID
DAC
76
FBRTN CPUID
1 2 34 5
VID4 VID3 VID2 VID1 VID0
Figure 1.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
datasheet pdf - http://www.DataSheet4U.net/

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