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PDF SA2400A Data sheet ( Hoja de datos )
| Número de pieza | SA2400A | |
| Descripción | Single Chip Transceiver for 2.45 Ghz ISM band | |
| Fabricantes | Philips | |
| Logotipo |  |
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INTEGRATED CIRCUITS
SA2400A
Single chip transceiver for
2.45 GHz ISM band
Product data
2002 Nov 04
Philips
Semiconductors
1 page  
Philips Semiconductors
Single chip transceiver for 2.45 GHz ISM band
Product data
SA2400A
Table 2. Pin description
PIN type is designated by A = Analog, D = Digital, I = Input, O = Output
SYMBOL
AGCRESET
AGCSET
IDCOUT
PIN DESCRIPTION
1 AGC start input
2 AGC settled output
3 Tx-mode:
DC reference current
TYPE
DI
DO
AO
A_GND
GND_LNA
RF_IN_P
RF_IN_N
GND_LNA
A_VDD
TEST_1
TEST_2
V_2P5
RSSI
D_VDD
V_TUNE
VCO_GND
VCO_VDD
VCO_P
4 Analog Ground
5 Analog Ground
6 RF input (positive)
7 RF input (negative)
8 Analog Ground
9 Analog Supply
10 Test pin
11 Test pin
12 DC reference voltage
13 RSSI output signal
14 Digital Supply
15 VCO tuning voltage
16 VCO ground
17 VCO Supply
18 VCO output/
External VCO input
AI
AI
AO
AO
AI
AI/O
VCO_M
19 VCO output/
External VCO input
AI/O
VDD_PLL
CP
LOCK
XTAL_1
XTAL_2
20 Synthesizer Supply
21 Charge pump output
22 Synthesizer lock indicator
23 Crystal input
24 Crystal input
AO
AO
AI
AI
SYMBOL
PIN DESCRIPTION
PLL_GND
25 Synthesizer Ground
REF_CLK_OUT 26 Reference clock output
D_GND
27 Digital and Analog Ground
RX_OUT_I_M 28 Receive output
RX_OUT_I_P 29 Receive output
RX_OUT_Q_M 30 Receive output
RX_OUT_Q_P 31 Receive output
A_VDD
TX_IN_Q_M
32 Analog Supply
33 Transmit input
TX_IN_Q_P
34 Transmit input
TX_IN_I_M/
TX_DATA_Q
35 Transmit input
TX_IN_I_P/
TX_DATA_I
36 Transmit input
TX/RX
37 Tx/Rx mode select
SCLK
38 Three-wire bus clock
SDATA
39 Three wire bus data
SEN
40 Three wire bus enable
A_GND
41 Analog Ground
TX_OUT_HI_M 42 Transmit output, high power
TX_OUT_HI_P 43 Transmit output, high power
A_GND
44 Analog Ground
TX_OUT_LO
45 Transmit output, low power
A_VDD
TX_HI
46 Analog Supply
47 Transmit output power level
select
A_GND
48 Analog Ground
TYPE
AO
AO
AO
AO
AO
AI
AI
AI/DI
AI/DI
DI
DI
DI/O
DI
AO
AO
AO
DI
2002 Nov 04
5
5 Page 
Philips Semiconductors
Single chip transceiver for 2.45 GHz ISM band
Product data
SA2400A
Specification
Conditions
Min Typ Max
Units
LO leakage to antenna
All gain modes. Incl balun
–
–75 –57
dBm
Residual sideband Rejection
Measured with single tone at 2 MHz offset from
carrier. Includes both IQ gain and phase error.
Notes 3, 7.
22
29 –
dB
Ripple band width of filter
Note 4.
5.6 6.3 7.0 MHz
3 dB band width of filter
Indicative, not tested. Note 4.
– 7–
MHz
In-band amplitude ripple
DC to ripple band width edge. Note 3.
–
– 0.6
dB peak
Out-of-band attenuation
Relative to minimum in-band gain
> 11 MHz
> 22 MHz
25 – –
55 – –
dB
dB
Lower 3 dB cut-off frequency of AC
coupling
Cascade of two 1st order high-pass filters.
a) NARROW BAND
b) INTERMEDIATE BAND
c) WIDE BAND
– 10 –
– 100 –
– 1000 –
kHz
kHz
kHz
Output load resistance
Pin to GND, differential. Note 5.
15 – –
kΩ
Output load capacitance
Pin to GND
– –6
pF
Nominal I & Q output voltage
Differential at the load specified. Note 6.
– 0.5 –
V peak
Maximum I & Q output voltage
Saturated, differential
–
– 1.5
V peak
Common mode IQ voltage
Programmable (see 0x04)
Mode 1
Mode 2
VCC/2–0.25 VCC/2 VCC/2+0.25 V
1.0 1.25 1.5 V
1 dB compression level at output
1 MHz tone, differential. Maximum gain.
1 ––
V peak
Total Harmonic Distortion
(measured at max and min gains)
Input 1 – 5 MHz signal, 1 V peak differential
sinusoidal at output, output spurs measured
differential up to 100 MHz. Ratio of rms total
spurious distortion to rms fundamental.
Receiver in minimum gain. Note 3.
–
24
%
Receiver in maximum gain. Note 3.
–
5 10
%
Phase Imbalance
Signal tone input at 2 MHz offset from carrier.
Indicative, not tested.
–
4–
deg
I, /I to Q, /Q amplitude imbalance
ratio of signal at I pin to /I pin;
Same for Q and /Q pins.
– 0.1 –
dB
RSSI voltage in settled state
(internal AGC)
Corresponds to I, Q output signal levels when 1.25 1.55 1.95
AGC_RESET is used, with RF input
between –10 and –80 dBm.
1 MHz tone, 0.5 V peak differential.
ACGTARGET = 0
V
RSSI voltage difference
1 dB change in input power compared to
settled state
– 64.5 –
mV
RSSI minimum voltage
Signal power = –10 dBc
– 0.9 –
V
RSSI maximum output voltage
Signal power = +10 dBc
– 2.2 –
V
RSSI error
–10 dBc < signal power < +10 dBc
– ±1 –
dB
NOTES:
1. Corresponds to –15 dBm input level at IC input, assuming typical 5 dB loss from the antenna to the IC input. The AGCTARGET register
should be set to “+5” which causes the AGC to settle to an output amplitude greater than the specified nominal value. A resistive divider
network at the output can be used to adjust the actual IQ output levels to the BB ADC range.
2. Guaranteed by design.
3. Verified by bench characterization and found to have sufficient margin for production.
4. At power-up time, the filter bandwidth is undefined. It needs to be calibrated with the internal tuner (FCALIB mode).
5. For unsymmetrical loading, attach the same load impedance to the unused pin; condition: for 80% of nominal output voltage swing.
6. Nominal I/Q output levels are understood as the levels the SA2400A will settle to after an AGCRESET action is performed with an RF input
signal modulated by a Barker sequence, and with AGCTARGET = 0.
7. RSB = 20*log(sqrt([1+K2 + 2Kcosϕ]/[1+K2 – 2Kcosϕ])), where K = linear gain imbalance, and ϕ = phase imbalance.
2002 Nov 04
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SA2400A.PDF ] | |
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