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PDF 7660S Data sheet ( Hoja de datos )
| Número de pieza | 7660S | |
| Descripción | ICL7660S | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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Data Sheet
ICL7660S
April 1999 File Number 3179.2
Super Voltage Converter
The ICL7660S Super Voltage Converter is a monolithic
CMOS voltage conversion IC that guarantees significant
performance advantages over other similar devices. It is a
direct replacement for the industry standard ICL7660 offering
an extended operating supply voltage range up to 12V, with
lower supply current. No external diode is needed for the
ICL7660S. In addition, a Frequency Boost pin has been
incorporated to enable the user to achieve lower output
impedance despite using smaller capacitors. All
improvements are highlighted in the Electrical Specifications
section. Critical parameters are guaranteed over the entire
commercial, industrial and military temperature ranges.
The ICL7660S performs supply voltage conversion from
positive to negative for an input range of 1.5V to 12V,
resulting in complementary output voltages of -1.5V to -12V.
Only 2 non-critical external capacitors are needed for the
charge pump and charge reservoir functions. The ICL7660S
can be connected to function as a voltage doubler and will
generate up to 22.8V with a 12V input. It can also be used as
a voltage multiplier or voltage divider.
The chip contains a series DC power supply regulator, RC
oscillator, voltage level translator, and four output power
MOS switches. The oscillator, when unloaded, oscillates at a
nominal frequency of 10kHz for an input supply voltage of
5.0V. This frequency can be lowered by the addition of an
external capacitor to the “OSC” terminal, or the oscillator
may be over-driven by an external clock.
The “LV” terminal may be tied to GND to bypass the internal
series regulator and improve low voltage (LV) operation. At
medium to high voltages (3.5V to 12V), the LV pin is left
floating to prevent device latchup.
Ordering Information
PART
NUMBER
ICL7660SCBA
ICL7660SCPA
TEMP.
RANGE
(oC)
0 to 70
0 to 70
PACKAGE
8 Ld P SOIC (N)
8 Ld PDIP
PKG. NO.
M8.15
E8.3
ICL7660SIBA
-40 to 85 8 Ld P SOIC (N)
M8.15
ICL7660SIPA
-40 to 85 8 Ld PDIP
www.DataSheet4U.com
ICL7660SMTV -55 to 125 8 Pin Metal Can
(Note)
E8.3
T8.C
NOTE: Add /883B to part number if 883B processing is required.
Features
• Guaranteed Lower Max Supply Current for All
Temperature Ranges
• Wide Operating Voltage Range 1.5V to 12V
• 100% Tested at 3V
• No External Diode Over Full Temperature and Voltage
Range
• Boost Pin (Pin 1) for Higher Switching Frequency
• Guaranteed Minimum Power Efficiency of 96%
• Improved Minimum Open Circuit Voltage Conversion
Efficiency of 99%
• Improved SCR Latchup Protection
• Simple Conversion of +5V Logic Supply to ±5V Supplies
• Simple Voltage Multiplication VOUT = (-)nVIN
• Easy to Use - Requires Only 2 External Non-Critical
Passive Components
• Improved Direct Replacement for Industry Standard
ICL7660 and Other Second Source Devices
Applications
• Simple Conversion of +5V to ±5V Supplies
• Voltage Multiplication VOUT = ±nVIN
• Negative Supplies for Data Acquisition Systems and
Instrumentation
• RS232 Power Supplies
• Supply Splitter, VOUT = ±VS/2
Pinouts
ICL7660S (PDIP, SOIC)
TOP VIEW
BOOST 1
CAP+ 2
GND 3
CAP- 4
8 V+
7 OSC
6 LV
5 VOUT
ICL7660S (CAN)
TOP VIEW
V+ (AND CASE)
8
BOOST 1
7 OSC
CAP+ 2
6 LV
GND 3
5 VOUT
4
CAP-
3-36
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1 page  
ICL7660S
Typical Performance Curves (Test Circuit Figure 12) (Continued)
V+ = 5V
TA = 25oC
400 I = 10mA
C1 = C2 =
1µF
C1 = C2 =
300 10µF
C1 = C2 =
200 100µF
100
0
100 1k 10k 100k
OSCILLATOR FREQUENCY (Hz)
NOTE:
FIGURE 11. OUTPUT SOURCE RESISTANCE AS A FUNCTION OF OSCILLATOR FREQUENCY
7. These curves include in the supply current that current fed directly into the load RL from the V+ (See Figure 12). Thus, approximately half the
supply current goes directly to the positive side of the load, and the other half, through the ICL7660S, to the negative side of the load. Ideally,
VOUT ∼ 2VIN, IS ∼ 2IL, so VIN x IS ∼ VOUT x IL.
Detailed Description
The ICL7660S contains all the necessary circuitry to
complete a negative voltage converter, with the exception of
2 external capacitors which may be inexpensive 10µF
polarized electrolytic types. The mode of operation of the
device may be best understood by considering Figure 13,
which shows an idealized negative voltage converter.
Capacitor C1 is charged to a voltage, V+, for the half cycle
when switches S1 and S3 are closed. (Note: Switches S2
and S4 are open during this half cycle.) During the second
half cycle of operation, switches S2 and S4 are closed, with
S1 and S3 open, thereby shifting capacitor C1 to C2 such
that the voltage on C2 is exactly V+, assuming ideal switches
and no load on C2. The ICL7660S approaches this ideal
situation more closely than existing non-mechanical circuits.
V+
18
IS V+
(+5V)
C1 +
10µF -
27
ICL7660S
36
45
IL
RL
-VOUT
C2
10µF
-
+
wwwNs.hDOoTauEtlda:SbFheoeirneltca4rregUae.scveoadmluteos1o0f0CµOF.SC (>1000pF) the values of C1 and C2
FIGURE 12. ICL7660S TEST CIRCUIT
In the ICL7660S, the 4 switches of Figure 13 are MOS power
switches; S1 is a P-Channel devices and S2, S3 and S4 are
N-Channel devices. The main difficulty with this approach is
that in integrating the switches, the substrates of S3 and S4
must always remain reverse biased with respect to their
sources, but not so much as to degrade their “ON”
resistances. In addition, at circuit start up, and under output
short circuit conditions (VOUT = V+), the output voltage must
be sensed and the substrate bias adjusted accordingly.
Failure to accomplish this would result in high power losses
and probable device latchup.
This problem is eliminated in the ICL7660S by a logic network
which senses the output voltage (VOUT) together with the
level translators, and switches the substrates of S3 and S4 to
the correct level to maintain necessary reverse bias.
The voltage regulator portion of the ICL7660S is an integral
part of the anti-latchup circuitry, however its inherent voltage
drop can degrade operation at low voltages. Therefore, to
improve low voltage operation “LV” pin should be connected
to GND, disabling the regulator. For supply voltages greater
than 3.5V the LV terminal must be left open to insure latchup
proof operation, and prevent device damage.
Theoretical Power Efficiency
Considerations
In theory a voltage converter can approach 100% efficiency
if certain conditions are met:
1. The drive circuitry consumes minimal power.
2. The output switches have extremely low ON resistance
and virtually no offset.
3. The impedance of the pump and reservoir capacitors are
negligible at the pump frequency.
3-40
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