PDF KM732V688 Data sheet ( Hoja de datos )

Número de pieza	KM732V688
Descripción	64Kx32-Bit Synchronous Pipelined Burst SRAM
Fabricantes	Samsung Semiconductor
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No Preview Available ! KM732V688/L PRELIMINARY 64Kx32 Synchronous SRAM Document Title 64Kx32-Bit Synchronous Pipelined Burst SRAM, 3.3V Power Datasheets for 100QFP/TQFP Revision History Rev. No. History Rev. 0.0 Initial draft Rev. 1.0 Final spec release Rev. 2.0 Change tOE value form 6.0 to 5.0 at tCYC 13ns. Change tCD value from 8.0 to 7.0 , tOE value form 7.0 to 5.0 at tCYC 15ns. Draft Date Jan. 19.1996 May. 25. 1997 Jun. 25. 1998 Remark Preliminary Final Final The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques- tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters. -1- Jun. 1998 Rev 2.0 1 page KM732V688/L PRELIMINARY 64Kx32 Synchronous SRAM TRUTH TABLES SYNCHRONOUS TRUTH TABLE CS1 CS2 CS2 ADSP ADSC ADV WRITE CLK HXX X LX X ↑ LLX L XX X ↑ LXH L XX X ↑ LLX X LX X ↑ LXH X LX X ↑ LHL L XX X ↑ LHL H LX L ↑ LHL H LX H ↑ XXX H HL H ↑ HXX X HL H ↑ XXX H HL L ↑ HXX X HL L ↑ XXX H HH H ↑ HXX X HH H ↑ XXX H HH L ↑ HXX X HH L ↑ Address Accessed N/A N/A N/A N/A N/A External Address External Address External Address Next Address Next Address Next Address Next Address Current Address Current Address Current Address Current Address NOTE : 1. X means "Don′t Care". 2. The rising edge of clock is symbolized by ↑. 3. WRITE = L means Write operation in WRITE TRUTH TABLE. WRITE = H means Read operation in WRITE TRUTH TABLE. 4. Operation finally depends on status of asynchronous input pins(ZZ and OE). Operation Not Selected Not Selected Not Selected Not Selected Not Selected Begin Burst Read Cycle Begin Burst Write Cycle Begin Burst Read Cycle Continue Burst Read Cycle Continue Burst Read Cycle Continue Burst Write Cycle Continue Burst Write Cycle Suspend Burst Read Cycle Suspend Burst Read Cycle Suspend Burst Write Cycle Suspend Burst Write Cycle WRITE TRUTH TABLE GW BW WEa WEb WEc WEd HHXXXX H L HHHH HL LHHH H L H L HH HLHHL L HL L L L L LXXXXX NOTE : 1. X means "Don′t Care". 2. All inputs in this table must meet setup and hold time around the rising edge of CLK(↑). Operation READ READ WRITE BYTE a WRITE BYTE b WRITE BYTE c and d WRITE ALL BYTEs WRITE ALL BYTEs ASYNCHRONOUS TRUTH TABLE (See Notes 1 and 2): Operation ZZ OE Sleep Mode HX Read LL LH Write LX Deselected LX I/O Status High-Z DQ High-Z Din, High-Z High-Z NOTE 1. X means "Don′t Care". 2. ZZ pin is pulled down internally 3. For write cycles that following read cycles, the output buffers must be disabled with OE, otherwise data bus contention will occur. 4. Sleep Mode means power down state of which stand-by current does not depend on cycle time. 5. Deselected means power down state of which stand-by current depends on cycle time. -5- Jun. 1998 Rev 2.0 5 Page KM732V688/L PRELIMINARY 64Kx32 Synchronous SRAM - 11 - Jun. 1998 Rev 2.0 11 Page

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