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PDF IRLMS5703 Data sheet ( Hoja de datos )

Número de pieza IRLMS5703
Descripción HEXFET Power MOSFET
Fabricantes International Rectifier 
Logotipo International Rectifier Logotipo



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No Preview Available ! IRLMS5703 Hoja de datos, Descripción, Manual

l Generation V Technology
l Micro6 Package Style
l Ultra Low Rds(on)
l P-Channel MOSFET
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient and reliable device for use
in a wide variety of applications.
The Micro6 package with its customized leadframe
produces a HEXFET power MOSFET with Rds(on)
60% less than a similar size SOT-23. This package is
ideal for applications where printed circuit board space
is at a premium. It's unique thermal design and RDS(on)
reduction enables a current-handling increase of nearly
300% compared to the SOT-23.
PD - 91413E
IRLMS5703
HEXFET® Power MOSFET
D1
A
6D
D2
5D
G3
4S
T op V iew
VDSS = -30V
RDS(on) = 0.20
M icro6
Absolute Maximum Ratings
ID @ TA = 25°C
ID @ TA = 70°C
IDM
PD @TA = 25°C
VGS
dv/dt
TJ, TSTG
Parameter
Continuous Drain Current, VGS @ -10V
Continuous Drain Current, VGS @- 10V
Pulsed Drain Current 
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt ‚
Junction and Storage Temperature Range
Max.
-2.3
-1.9
-13
1.7
13
± 20
5.0
-55 to + 150
Units
A
W
mW/°C
V
V/ns
°C
Thermal Resistance Ratings
RθJA
Parameter
Maximum Junction-to-Ambient „
Min.
–––
Typ.
–––
Max
75
Units
°C/W
4/7/04

1 page




IRLMS5703 pdf
IRLMS5703
-10V
QGS
VG
QG
QGD
Charge
VDS
VGS
RG
RD
D.U.T.
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
-
+ VDD
Fig 9a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50K
12V .2µF
.3µF
D.U.T.
-
+VDS
VGS
-3mA
IG ID
Current Sampling Resistors
Fig 9b. Gate Charge Test Circuit
100
Fig 10a. Switching Time Test Circuit
VGS
10%
td(on) tr
td(off) tf
90%
VDS
Fig 10b. Switching Time Waveforms
D = 0.50
0.20
10 0.10
0.05
0.02
0.01
1
0.1
0.00001
PDM
SINGLE PULSE
(THERMAL RESPONSE)
0.0001
0.001
t1
t2
Notes:
1. Duty factor D = t1 / t 2
2. Peak T J = P DM x Z thJA + TA
0.01 0.1
t1, Rectangular Pulse Duration (sec)
1
10
100
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient

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