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PDF LXT9863 Data sheet ( Hoja de datos )
| Número de pieza | LXT9863 | |
| Descripción | (LXT9883 / LXT9863) Advanced 10/100 Unmanaged Repeater | |
| Fabricantes | Intel | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de LXT9863 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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LXT9883/9863
Advanced 10/100 Unmanaged Repeater
Datasheet
The LXT9883 is an advanced, 3.3V, 8-port 10/100 repeater. The LXT9883 is compatible with
previous generations of Intel repeaters from the LXT980 and LXT918 families. Eight ports
directly support 100BASE-TX/10BASE-T copper media. Two additional Media Independent
Interface (MII) ports (10/100Mbps selectable) connect to Media Access Controllers (MACs) for
bridge/switch applications. The LXT9863 offers the same features and functionality in a six-port
device. This data sheet uses the singular designation “LXT98x3” to refer to both devices.
The LXT98x3 provides auto-negotiation with parallel detection for the PHY ports. The
LXT98x3 provides two internal repeater state machines—one operating at 10 Mbps and one at
100 Mbps. Once configured, the LXT98x3 automatically connects each port to the appropriate
repeater. The LXT98x3 also provides two Inter-Repeater Backplanes (IRBs) for expansion —
one operating at 10 Mbps and one at 100 Mbps. Up to 240 twisted-pair and MII ports can
logically be combined into one repeater.
Product Features
s Six or eight 10/100 ports with integrated
twisted-pair PHYs including integrated
filters.
s Two 10/100 MIIs for bridging.
s Independent segments for 10Mbps and
100 Mbps operation.
s Cascadable Inter-Repeater Backplanes
(IRBs), with option for 5V stacking
compatibility.
s Integrated LED drivers with user-selectable
modes.
s Available in 208-pin QFP package.
s Operating temperature range: 0-70°C,
ambient.
As of January 15, 2001, this document replaces the Level One document
LXT9883/LXT9863 — Advanced 10/100 Unmanaged Repeater.
Order Number: 249115-003
August 2001
1 page  
Contents
Tables
1 MII #1 Signal Descriptions ............................................................................................................ 9
2 MII #2 Signal Descriptions .......................................................................................................... 10
3 Inter-Repeater Backplane Signal Descriptions ........................................................................... 11
4 Twisted-Pair Port Signal Descriptions ........................................................................................ 13
5 LED Signal Descriptions ............................................................................................................. 14
6 Power Supply and Indication Signal Descriptions ...................................................................... 15
7 Miscellaneous Signal Descriptions ............................................................................................. 16
8 Serial LED Port Bit Stream ......................................................................................................... 23
9 ACTGLED Display Modes .......................................................................................................... 24
10 LED Terms.................................................................................................................................. 24
11 LED Mode 1 Indications.............................................................................................................. 25
12 LED Mode 2 Indications.............................................................................................................. 26
13 LED Mode 3 Indications.............................................................................................................. 27
14 LED Mode 4 Indications.............................................................................................................. 28
15 Cascading and Stacking Connections ........................................................................................ 30
16 IRB Signal Details....................................................................................................................... 31
17 LXT98x3 Magnetics Specifications............................................................................................. 36
18 Oscillator Manufacturers............................................................................................................. 37
19 Absolute Maximum Ratings ........................................................................................................ 44
20 Operating Conditions .................................................................................................................. 44
21 Input System Clock1 Requirements ........................................................................................... 44
22 I/O Electrical Characteristics....................................................................................................... 45
23 100 Mbps IRB Electrical Characteristics..................................................................................... 45
24 10 Mbps IRB Electrical Characteristics....................................................................................... 46
25 100BASE-TX Transceiver Electrical Characteristics ................................................................. 47
26 10BASE-T Transceiver Electrical Characteristics...................................................................... 47
27 100 Mbps TP Port-to-Port Delay Timing Parameters ................................................................. 48
28 100BASE-TX MII-to-TP Port Timing Parameters ....................................................................... 49
29 100BASE-TX TP-to-MII Timing Parameters ............................................................................... 50
30 10BASE-T MII-to-TP Timing Parameters ................................................................................... 51
31 10BASE-T TP-to-MII Port Timing Parameters............................................................................ 52
32 100 Mbps TP-to-IRB Timing Parameters1.................................................................................. 53
33 10 Mbps TP-to-IRB Timing Parameters1.................................................................................... 54
34 10 Mbps IRB-to TP Port Timing Parameters .............................................................................. 55
Datasheet
Document #: 249115
Revision #: 003
Rev. Date: 08/07/01
5
5 Page 
Advanced 10/100 Unmanaged Repeater — LXT9883/9863
Table 3. Inter-Repeater Backplane Signal Descriptions
Pin Symbol
Type1, 2
Description
Common IRB Signals
39 COMP_SEL
Compatibility Mode Select. 3.3V on this pin causes the IRCFSBP signals to operate in
AI 3.3V only mode. 5V on this pin causes the IR100CFSBP or IR10CFSBP signals to
operate in 5V backwards compatibility mode with LXT98x devices.
100 Mbps IRB Signals
36 IR100CFS3
A I/O
OD
100 Mbps IRB Collision Force Sense. A three-level signal that determines number of
active ports on the “logical” repeater. High level (3.3V) indicates no ports active; Mid
level (approx. 1.6V) indicates one port active; Low level (0V) indicates more than one
port active, resulting in a collision. This signal requires a 215Ω pull-up resistor, and
connects between ICs on the same board.
37 IR100CFSBP
A I/O
OD
100 Mbps IRB Collision Force Sense - Backplane. This three-level signal functions
the same as IR100CFS; however, it connects between ICs with FPS = 0, on different
boards. IR100CFSBP requires a single 91Ω pull-up resistor in each stack. This signal
can be set in either 5V or 3.3V modes by the COMP_SEL pin.
38 IR100SNGL
I/O
Schmitt PU
100 Mbps Single Driver State. This active Low signal is asserted by the device with
FPS = 0 when a packet is received from one or more ports. Do not connect this signal
between boards.
40 IR100COL
I/O
Schmitt PU
100 Mbps Multiple Driver State. This active Low signal is asserted by the device with
FPS = 0 when a packet is being received from more than one port (collision). Do not
connect this signal between boards.
41 IR100DEN
100 Mbps IRB Driver Enable. This output provides directional control for an external
O
OD
bidirectional transceiver (74LVT245) used to buffer the 100 Mbps IRB in multi-board
applications. It must be pulled up by a 330Ω resistor. When there are multiple devices
on one board, tie all IR100DEN outputs together. If IR100DEN is tied directly to the DIR
pin on a 74LVT245, attach the on-board IR100DAT, IR100CLK, and IR100DV signals to
the “B” side of the 74LVT245, and connect the off-board signals to the “A” side of the
74LVT245.
42 IR100DV
I/O
Schmitt
OD
PU
100 Mbps IRB Data Valid. This active Low signal indicates port activity on the
repeater. IR100DV frames the clock and data of the packet on the backplane. This
signal requires a 300Ω pull-up resistor.
43 IR100DAT0
44 IR100DAT1
45 IR100DAT2
48 IR100DAT3
49 IR100DAT4
I/O
Tri-state
Schmitt
PU
100 Mbps IRB Data. These bidirectional signals carry 5-bit data on the 100 Mbps IRB.
Data is driven on the falling edge and sampled on the rising edge of IR100CLK. Buffer
these signals between boards.
50 IR100CLK
I/O
Tri-state
Schmitt
PD
100 Mbps IRB Clock. This bidirectional, non-continuous, 25 MHz clock is recovered
from received network traffic. Schmitt triggering is used to increase noise immunity. This
signal must be pulled to VCC when idle. One 1 kΩ pull-up resistor on both sides of a
74LVT245 buffer is recommended.
1. I = Input, O = Output, I/O = Input/Output, D = Digital, AI = Analog Input, A I/O = Analog Input/Output, OD = Open Drain,
OS = Open Source, PD = Pull Down, PU = Pull Up. Even if the IRB is not used, required pull-up resistors must be installed as
listed above.
NC = No Clamp. Pad does not clamp input in the absence of power.
2. Pins are 5V tolerant, unless indicated.
3. IR100CFS is not 5V tolerant.
4. IR10CFS is not 5V tolerant.
Datasheet
Document #: 249115
Revision #: 003
Rev. Date: 08/07/01
11
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