KMM372C410CK Datasheet PDF - Samsung Semiconductor
| Part Number | KMM372C410CK | |
| Description | DRAM Module | |
| Manufacturers | Samsung Semiconductor | |
| Logo |  |
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DRAM MODULE
KMM372C400CK/CS
KMM372C410CK/CS
KMM372C400CK/CS & KMM372C410CK/CS with Fast Page Mode
4Mx72 DRAM DIMM with ECC using 4Mx4, 4K & 2K Refresh, 5V
GENERAL DESCRIPTION
The Samsung KMM372C40(1)0C is a 4Mx72bits Dynamic
RAM high density memory module. The Samsung
KMM372C40(1)0C consists of eighteen CMOS 4Mx4bits
DRAMs in SOJ/TSOP-II 300mil package, and two 16bits driver
IC in 48pin TSSOP package mounted on a 168-pin glass-
epoxy substrate. A 0.1 or 0.22uF decoupling capacitor is
mounted on the printed circuit board for each DRAM. The
KMM372C40(1)0C is a Dual In-line Memory Module and is
intended for mounting into 168-pin edge connector sockets.
PERFORMANCE RANGE
Speed
-5
tRAC
50ns
tCAC
18ns
tRC
90ns
-6
60ns
20ns
110ns
FEATURES
• Part Identification
- KMM372C400CK (4096 cycles/64ms Ref., SOJ)
- KMM372C400CS (4096 cycles/64ms Ref., TSOP)
- KMM372C410CK (2048 cycles/32ms Ref., SOJ)
- KMM372C410CS (2048 cycles/32ms Ref., TSOP)
• Fast Page Mode Operation
• CAS-before-RAS Refresh capability
• RAS-only and Hidden refresh capability
• TTL compatible inputs and outputs
• Single 5V±10% power supply
• JEDEC standard pinout & Buffered PDpin
• Buffered input except RAS and DQ
• PCB : Height(1000mil), double sided component
PIN CONFIGURATIONS
PIN NAMES
Pin Front Pin Front Pin Front Pin Back Pin Back Pin Back
Pin Names
Function
1 VSS 29 RSVD 57 DQ22 85 VSS 113 RSVD 141 DQ58
2 DQ0 30 RAS0 58 DQ23 86 DQ36 114 *RAS1 142 DQ59
A0, B0, A1 - A11 Address Input (4K Ref)
A0, B0, A1 - A10 Address Input (2K Ref)
3 DQ1 31 OE0 59 VCC 87 DQ37 115 RFU 143 VCC
DQ0 - DQ71
Data In/Out
4 DQ2 32 VSS 60 DQ24 88 DQ38 116 VSS 144 DQ60
5 DQ3 33 A0 61 RFU 89 DQ39 117 A1 145 RFU
6 VCC 34 A2 62 RFU 90 VCC 118 A3 146 RFU
7 DQ4 35 A4 63 RFU 91 DQ40 119 A5 147 RFU
W0, W2
OE, OE2
RAS0, RAS2
Read/Write Enable
Output Enable
Row Address Strobe
8 DQ5 36 A6 64 RFU 92 DQ41 120 A7 148 RFU
CAS0, CAS4
Colume Address Strobe
9 DQ6 37 A8 65 DQ25 93 DQ42 121 A9 149 DQ61
10 DQ7 38 A10 66 DQ26 94 DQ43 122 A11 150 DQ62
11 DQ8 39 *A12 67 DQ27 95 DQ44 123 *A13 151 DQ63
VCC
VSS
Power(+5V)
Ground
12 VSS 40 VCC 68 VSS 96 VSS 124 VCC 152 VSS
NC
No Connection
13 DQ9 41
14 DQ10 42
15 DQ11 43
16 DQ12 44
RFU
RFU
VSS
OE2
69 DQ28 97 DQ45 125 RFU 153 DQ64
70 DQ29 98 DQ46 126 B0 154 DQ65
71 DQ30 99 DQ47 127 VSS 155 DQ66
72 DQ31 100 DQ48 128 RFU 156 DQ67
PDE
PD1 - 8
ID0 - 1
Presence Detect Enable
Presence Detect
ID bit
17 DQ13 45 RAS2 73 VCC 101 DQ49 129 *RAS3 157 VCC
18 VCC 46 CAS4 74 DQ32 102 VCC 130 *CAS5 158 DQ68
19 DQ14 47 RSVD 75 DQ33 103 DQ50 131 RSVD 159 DQ69
20 DQ15 48 W2 76 DQ34 104 DQ51 132 PDE 160 DQ70
21 DQ16 49 VCC 77 DQ35 105 DQ52 133 VCC 161 DQ71
RSVD
Reserved Use
RFU
Reserved for Future Use
Pins marked ′*′ are not used in this module.
PD & ID Table
22 DQ17 50 RSVD 78
23 VSS 51 RSVD 79
24 RSVD 52 DQ18 80
25 RSVD 53 DQ19 81
26 VCC 54 VSS 82
27 W0 55 DQ20 83
28 CAS0 56 DQ21 84
VSS
PD1
PD3
PD5
PD7
ID0
VCC
106 DQ53 134 RSVD 162
107 VSS 135 RSVD 163
108 RSVD 136 DQ54 164
109 RSVD 137 DQ55 165
110 VCC 138 VSS 166
111 RFU 139 DQ56 167
112 *CAS1 140 DQ57 168
NOTE : A11 is used for only KMM372C400CK/CS (4K ref.)
VSS
PD2
PD4
PD6
PD8
ID1
VCC
Pin
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
50NS
1
1
0
1
0
0
0
0
60NS
1
1
0
1
0
1
1
0
PD Note : PD & ID Terminals must each be pulled up through a register to VCC at the next higher
ID0
ID1
0
0
0
0
level assembly. PDs will be either open (NC) or driven to VSS via on-board buffer circuits. PD : 0 for Vol of Drive IC & 1 for N.C
ID Note : IDs will be either open (NC) or connected directly to VSS without a buffer.
ID : 0 for Vss & 1 for N.C
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DRAM MODULE
KMM372C400CK/CS
KMM372C410CK/CS
AC CHARACTERISTICS (0°C≤TA≤70°C, VCC=5.0V±10%. See notes 1,2.)
Test condition : Vih/Vil=2.4/0.8V, Voh/Vol=2.4/0.4V, Output loading CL=100pF
Parameter
CAS precharge to W delay time
RAS to W delay time
CAS setup time(CAS-before-RAS refresh)
CAS hold time(CAS-before-RAS refresh)
RAS precharge to CAS hold time
Access time from CAS precharge
Fast page mode cycle time
Fast page mode read-modify-write cycle time
CAS precharge time(Fast page cycle)
RAS pulse width (Fast page cycle)
RAS hold time from CAS precharge
W to RAS precharge time (C-B-R refresh)
W to RAS hold time (C-B-R refresh)
CAS precharge(C-B-R counter test)
OE access time
OE to data delay
Output buffer turn off delay time from OE
OE command hold time
Symbol
tCPWD
tRWD
tCSR
tCHR
tRPC
tCPA
tPC
tPRWC
tCP
tRASP
tRHCP
tWRP
tWRH
tCPT
tOEA
tOED
tOEZ
tOEH
-5
Min Max
53
71
10
8
3
35
35
75
10
50 200K
35
15
8
20
18
18
5
13
-6
Min Max
60
83
10
8
3
40
40
80
10
60 200K
40
15
8
20
20
20
5 20
15
Present Detect Read Cycle
PDE to Valid PD bit
PDE to PD bit Inactive
tPD 10 10
tPDOFF
2
7
2
7
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
7
7,11
11
11
11
3,11
11
11
11
11
11
11
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for KMM372C410CK electronic component. |
| Information | Total 19 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ KMM372C410CK.PDF Datasheet ] | |
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Featured Datasheets
| Part Number | Description | MFRS |
| KMM372C410CK | The function is DRAM Module. Samsung Semiconductor | |
| KMM372C410CS | The function is DRAM Module. Samsung Semiconductor | |
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