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KMM372V404BS Datasheet دیتاشیت PDF دانلود

دیتاشیت - Samsung Semiconductor - DRAM Module

شماره قطعه KMM372V404BS
شرح مفصل DRAM Module
تولید کننده Samsung Semiconductor 
آرم Samsung Semiconductor 


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KMM372V404BS شرح
DRAM MODULE
KMM372V404BS
KMM372V404BS Fast Page Mode
4M x 72 DRAM DIMM with ECC Using 4Mx16 & 4Mx4 , 4K Refresh, 3.3V
GENERAL DESCRIPTION
The Samsung KMM372V404B is a 4Mx72bits Dynamic RAM
high density memory module. The Samsung KMM372V404B
consists of four 4Mx16bits & two 4Mx4bits CMOS DRAMs in
TSOP-II 400mil packages and two 16 bits driver IC in TSSOP
package mounted on a 168-pin glass-epoxy substrate. A 0.1
or 0.22uF decoupling capacitor is mounted on the printed cir-
cuit board for each DRAM. The KMM372V404B is a Dual In-
line Memory Module and is intended for mounting into 168 pin
edge connector sockets.
PERFORMANCE RANGE
Speed
tRAC
tCAC
tRC
tPC
-5
50ns
18ns
90ns
35ns
-6
60ns
20ns
110ns
40ns
FEATURES
• Part Identification
• KMM372V404BS(4096cycles/64ms Ref. TSOP ll)
• Fast Page Mode Operation
• CAS-before-RAS Refresh capability
• RAS-only and Hidden refresh capability
• LVTTL compatible inputs and outputs
• Single 3.3V±0.3V power supply
• JEDEC standard pinout & Buffered PDpin
• Buffered input except RAS and DQ
• PCB : Height(1000mil), single sided component
PIN CONFIGURATIONS
PIN NAMES
Pin Front Pin Front Pin Front Pin Back Pin Back Pin Back
Pin Names
Function
1 VSS 29 *CAS2 57 DQ22 85 VSS 113 *CAS3 141 DQ58
2 DQ0 30 RAS0 58 DQ23 86 DQ36 114 *RAS1 142 DQ59
3 DQ1 31 OE0 59 VCC 87 DQ37 115 RFU 143 VCC
4 DQ2 32 VSS 60 DQ24 88 DQ38 116 VSS 144 DQ60
5 DQ3 33 A0 61 RFU 89 DQ39 117 A1 145 RFU
6 VCC 34 A2 62 RFU 90 VCC 118 A3 146 RFU
7 DQ4 35 A4 63 RFU 91 DQ40 119 A5 147 RFU
8 DQ5 36 A6 64 RFU 92 DQ41 120 A7 148 RFU
9 DQ6 37 A8 65 DQ25 93 DQ42 121 A9 149 DQ61
10 DQ7 38 A10 66 DQ26 94 DQ43 122 A11 150 DQ62
11 DQ8 39 A12 67 DQ27 95 DQ44 123 *A13 151 DQ63
12 VSS 40 VCC 68 VSS 96 VSS 124 VCC 152 VSS
13 DQ9 41 RFU 69 DQ28 97 DQ45 125 RFU 153 DQ64
14 DQ10 42 RFU 70 DQ29 98 DQ46 126 B0 154 DQ65
15 DQ11 43 VSS 71 DQ30 99 DQ47 127 VSS 155 DQ66
16 DQ12 44 OE2 72 DQ31 100 DQ48 128 RFU 156 DQ67
17 DQ13 45 RAS2 73 VCC 101 DQ49 129 *RAS3 157 VCC
18 VCC 46 CAS4 74 DQ32 102 VCC 130 *CAS5 158 DQ68
19 DQ14 47 *CAS6 75 DQ33 103 DQ50 131 *CAS7 159 DQ69
20 DQ15 48 W2 76 DQ34 104 DQ51 132 PDE 160 DQ70
21 DQ16 49 VCC 77 DQ35 105 DQ52 133 VCC 161 DQ71
22 DQ17 50 RSVD 78 VSS 106 DQ53 134 RSVD 162 VSS
23 VSS 51 RSVD 79 PD1 107 VSS 135 RSVD 163 PD2
24 RSVD 52 DQ18 80 PD3 108 RSVD 136 DQ54 164 PD4
25 RSVD 53 DQ19 81 PD5 109 RSVD 137 DQ55 165 PD6
26 VCC 54 VSS 82 PD7 110 VCC 138 VSS 166 PD8
27 W0 55 DQ20 83 ID0 111 RFU 139 DQ56 167 ID1
28 CAS0 56 DQ21 84 VCC 112 *CAS1 140 DQ57 168 VCC
A0, B0, A1 - A11 Address Input(4K ref.)
DQ0 - DQ71
Data In/Out
W0, W2
Read/Write Enable
OE0, OE2
Output Enable
RAS0, RAS2
Row Address Strobe
CAS0, CAS4
Column Address Strobe
VCC Power(+3.3V)
VSS Ground
NC No Connection
PDE
Presence Detect Enable
PD1 - 8
Presence Detect
ID0 - 1
ID bit
RSVD
Reserved Use
RFU
Reserved for Future Use
Pins marked¡®*¡¯are not used in this module.
PD & ID Table
Pin
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
50NS
1
1
0
1
0
0
0
0
60NS
1
1
0
1
0
1
1
0
PD Note :PD & ID Terminals must each be pulled up through a register to V CC at the next higher
ID0
ID1
0
0
level assembly. PDs will be either open (NC) or driven to V SS via on-board buffer circuits. PD : 0 for Vol of Drive IC & 1 for N.C
ID Note : IDs will be either open (NC) or connected directly to V SS without a buffer.
ID : 0 for Vss & 1 for N.C
0
0

قانون اساسیصفحه 19
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